We have ubiquitous presence of computers today, ranging from simple controllers in modern appliances to smartphones in our pockets that provide a wide range of everyday services, to powerful supercomputers and large data centers that carry out the most computationally intensive tasks. These computational machines have a few things in common: for example, the information they handle is stored in bits (0 or 1), and the procedure for processing the information is specified by a program. A great deal is known about the limits of what such computational machines can and cannot do efficiently. There are many important computational problems that are believed to be very difficult to solve using even the most powerful computers, where the resource requirement-whether it is the size of the machine or the time it takes to finish the task-increases exponentially as a function of the problem size.

Quantum computing performance simulators are needed to provide practical metrics for the effectiveness of executing theoretical quantum information processing protocols on physical hardware. In this work, we present a tool to simulate the execution of fault-tolerant quantum computation by automating the tracking of common fault paths for error propagation through an encoded circuit block and quantifying the failure probability of each encoded qubit throughout the circuit. Our simulator runs a fault path counter on encoded circuit blocks to determine the probability that two or more errors remain on the encoded qubits after each block is executed, and it combines errors from all the encoded blocks to estimate performance metrics such as the logical qubit failure probability, the overall circuit failure probability, the number of qubits used, and the time required to run the overall circuit. Our technique efficiently estimates the upper bound of the error probability and provides a useful measure of the error threshold at low error probabilities where conventional Monte Carlo methods are ineffective. We describe a way of simplifying the fault-tolerant measurement process in the Steane code to reduce the number of error correction steps necessary. We present simulation results comparing the execution of quantum adders, which constitute a major part of Shor’s algorithm.

The optimal design of a fault-tolerant quantum computer involves finding an appropriate balance between the burden of large-scale integration of noisy components and the load of improving the reliability of hardware technology. This balance can be evaluated by quantitatively modeling the execution of quantum logic operations on a realistic quantum hardware containing limited computational resources. In this work, we report a complete performance simulation software tool capable of (1) searching the hardware design space by varying resource architecture and technology parameters, (2) synthesizing and scheduling a fault-tolerant quantum algorithm within the hardware constraints, (3) quantifying the performance metrics such as the execution time and the failure probability of the algorithm, and (4) analyzing the breakdown of these metrics to highlight the performance bottlenecks and visualizing resource utilization to evaluate the adequacy of the chosen design. Using this tool, we investigate a vast design space for implementing key building blocks of Shor’s algorithm to factor a 1,024-bit number with a baseline budget of 1.5 million qubits. We show that a trapped-ion quantum computer designed with twice as many qubits and one-tenth of the baseline infidelity of the communication channel can factor a 2,048-bit integer in less than 5 months.

Efforts to build quantum computers using ion-traps have demonstrated all elementary qubit operations necessary for scalable implementation. Modular architectures have been proposed to construct modest size quantum computers with up to 104- 106qubits using technologies that are available today (MUSIQC architecture). Concrete scheduling procedure to execute a given quantum algorithm on such a hardware is a significant task, but existing quantum CAD tools generally do not account for the underlying connectivity of the qubits or the limitation on the hardware resources available for the scheduling. We present a scheduler and performance simulator that fully accounts for these resource constraints, capable of estimating the execution time and error performances of executing a quantum circuit on the hardware. We outline the construction of tool components, and describe the process of mapping the qubits to ions and scheduling the physical gates in the MUSIQC architecture. Using this tool, we quantify the trade-off between hardware resource constraints and performance of the computer and show that at an expense of x fold increase in latency, a minimum of 1.6x resource reduction is possible for executing a three-qubit Bernstein-Vazirani algorithm encoded using Steane code.

Many infrared optical systems in wide-ranging applications such as surveillance and security frequently require large fields of view. Often this necessitates a focal plane array (FPA) with a large number of pixels, which, in general, is very expensive. In this paper, we propose a method for increasing the field of view without increasing the pixel resolution of the FPA by superimposing the multiple subimages within a scene and disambiguating the observed data to reconstruct the original scene. This technique, in effect, allows each subimage of the scene to share a single FPA, thereby increasing the field of view without compromising resolution. To disambiguate the subimages, we develop wavelet regularized reconstruction methods which encourage sparsity in the solution. We present results from numerical experiments that demonstrate the effectiveness of this approach.

Cellular interactions are subject to random fluctuations (noise) in quantities of interacting molecules. Noise presents a major challenge for the robust function of natural and engineered cellular networks. Past studies have analyzed how noise is regulated at the intracellular level. Cell-cell communication, however, may provide a complementary strategy to achieve robust gene expression by enabling the coupling of a cell with its environment and other cells. To gain insight into this issue, we have examined noise regulation by quorum sensing (QS), a mechanism by which many bacteria communicate through production and sensing of small diffusible signals. Using a stochastic model, we analyze a minimal QS motif in Gram-negative bacteria. Our analysis shows that diffusion of the QS signal, together with fast turnover of its transcriptional regulator, attenuates low-frequency components of extrinsic noise. We term this unique mechanism "diffusional dissipation" to emphasize the importance of fast signal turnover (or dissipation) by diffusion. We further show that this noise attenuation is a property of a more generic regulatory motif, of which QS is an implementation. Our results suggest that, in a QS system, an unstable transcriptional regulator may be favored for regulating expression of costly proteins that generate public goods.