Demo Data from EDBT 2026 / reviewers in the wild / expert
M. Helena Fino
dblp:87/986 · also Maria Helena Fino
· DBLP profile ↗
6ranked-venue papers
2as first author
0since 2021 · last 2016
0000-0003-3884-0059ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 70% Integrated circuit design · 30% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
analog and mixed-signal circuits |
0.0 | 1 | 1995 | Automatic symbolic analysis of switched-capacitor filtering networks using signal flow graphs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation › circuit simulation › analog circuit simulation
switched-capacitor network analysis |
0.0 | 1 | 1995 | Automatic symbolic analysis of switched-capacitor filtering networks using signal flow graphs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation › circuit analysis
symbolic analysis |
0.0 | 1 | 1995 | Automatic symbolic analysis of switched-capacitor filtering networks using signal flow graphs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation › circuit analysis
signal flow graph analysis |
0.0 | 1 | 1995 | Automatic symbolic analysis of switched-capacitor filtering networks using signal flow graphs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Methods — techniques the papers use, named apart from their topics
signal flow graphs · 0.0rule-based techniques · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | Sensitivity aware NSGA-II based Pareto front generation for the optimal sizing of analog circuits
O. Bellaaj Kchaou, Amel Garbaya, Mouna Kotti, Pedro Pereira 0001, Mourad Fakhfakh, M. Helena Fino |
Integr. | 6 |
| 2016 | A hybrid approach for the sensitivity analysis of integrated inductors
Amin Sallem, Pedro Pereira 0001, M. Helena Fino, Mourad Fakhfakh |
Integr. | 3 |
| 2015 | Physical vs. surrogate models of passive RF devicesabstractThe accuracy of high-frequency models of passive RF devices, e.g., inductors or transformers, presents one of the most challenging problems for RF integrated circuits. Accuracy limitations lead RF designers to time-consuming iterations with electromagnetic simulators. This paper will explore and compare two advanced modeling techniques. The first one is based on the segmented model approach, in which each device segment is characterized with a lumped element model. The second technique is based on the generation of surrogate models from the electromagnetic simulation of a set of device samples. Different modeling strategies (frequency separation, filtering according to self-resonance frequency, etc.) will be considered. Efficiency and accuracy of both, physical and surrogate, modeling techniques will be compared using a Si process technology. Fábio Passos, Mouna Kotti, Reinier Gonzalez-Echevarria, M. Helena Fino, Mourad Fakhfakh, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández 0001 |
ISCAS | 4 |
| 2000 | Symbolic techniques applied to switched-current ADCs synthesisabstractThis paper discusses the use of symbolic methods applied to the design automation of SI data converters. The proposed approach is an extension of an already proved methodology, for the symbolic synthesis of linear and nonlinear data converters. This is performed by introducing SI characteristics in modified signal flow graph representation of conversion algorithms, including a new set of functional and electrical structures in the system library and, finally, defining an appropriate sizing mechanism for the new structures. The design process is here exemplified for a well known data conversion algorithm. Nuno Horta, M. Helena Fino, João Goes |
ISCAS | 2 |
| 1995 | Automatic Symbolic Characterization of SC Multirate Circuits with Finite Grain Operational AmplifiersabstractA knowledge-based approach for the automatic symbolic characterization of SC circuits is presented considering the effect of non-ideal finite gain operational amplifiers. This includes conventional filtering structures above second order as well as generalized multirate structures with switching waveforms performing multiple sampling-discharge operations per clock period. M. Helena Fino, José E. Franca, Adolfo Steiger-Garção |
ISCAS | 1 |
| 1995 | Automatic symbolic analysis of switched-capacitor filtering networks using signal flow graphsabstractSignal flow graphs (SFG's) are a powerful technique to analyze switched-capacitor (SC) circuits in a way that provides in-depth information about their operation and direct access to the corresponding symbolic z-transfer functions. Due to lengthy and error-prone symbolic manipulations this is manually manageable for simple first- or second-order circuits, but becomes unpractical for manipulating higher-order circuits which can not be decomposed into first- and second-order ones. Hence, there is an important need to provide designers with a computer-aided tool for the SFG symbolic analysis of a broad class of SC filtering networks, as described in this paper. Rule-based techniques are employed to capture from arbitrary circuit schematic and timing diagrams the corresponding symbolic SFG leading to the automatic generation of the associated z-transfer function. Symbols can then be instantiated to numerical values to obtain measurable data on a variety of performance indicators such as total capacitor area and capacitance spread as well as the resulting nominal frequency response and its variability against component errors. This is illustrated considering a variety of examples of SC filtering networks including, besides the more traditional filters, both finite and infinite impulse response decimators.> M. Helena Fino, José E. Franca, Adolfo Steiger-Garção |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |