An algorithm for minimizing the bit dimension of READ- ONLY memories employed in the control section of microprogrammed digital computers is illustrated. The algorithm employs techniques which are well known in switching theory, such as compatibility classes and covering tables of the prime implicant type.

A cellular structure ("transfer logic"), suitable for implementing sequential networks, is described in this paper. A method is outlined for obtaining, for a given flow table, a transfer logic assignment employing the minimal number of state variables. The method is based on the properties of partitions of the set of internal states.

In this paper, an algorithm is presented to find a minimal closed partition of the set of internal states of an incompletely specified flow table. The minimal partition is obtained by solving an integer linear program.

A method is illustrated for minimizing the number of internal states in incompletely specified sequential networks. The minimization algorithm applies to any type of incompletely specified flow table. It is shown that only some compatibility classes (prime compatibility classes) need be considered as members of a solution. The selection of prime classes may be obtained as the solution of an integer linear program or by tabular techniques that are an extension of those used in the selection of prime implicants.

Many computer applications require a control structure which can be easily modified to achieve optimum processing time. A program-modifiable control unit of new design is described here.

Sequential circuits techniques for the synthesis of digital-computer-control units are investigated. The assumption is made that the operations to be controlled are complex sequences of asynchronous events linked by precedence relations. An algorithm for the synthesis of the control unit flow table from the list of precedence statements is given.