Demo Data from EDBT 2026 / reviewers in the wild / expert
Jing Wu 0007
dblp:88/3604-7
· DBLP profile ↗
3ranked-venue papers
3as first author
0since 2021 · last 2014
0009-0004-7049-5480ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
High-performance computing · 70% GPUs and heterogeneous computing · 23% Memory systems · 7% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
High-performance computing
fast fourier transform |
0.2 | 1 | 2014 | An Optimized FFT-Based Direct Poisson Solver on CUDA GPUs · IEEE Trans. Parallel Distributed Syst. 2014 |
GPUs and heterogeneous computing
GPU computing |
0.2 | 1 | 2014 | An Optimized FFT-Based Direct Poisson Solver on CUDA GPUs · IEEE Trans. Parallel Distributed Syst. 2014 |
High-performance computing › numerical linear algebra › linear solver
poisson solver |
0.2 | 1 | 2014 | An Optimized FFT-Based Direct Poisson Solver on CUDA GPUs · IEEE Trans. Parallel Distributed Syst. 2014 |
High-performance computing
scientific computing |
0.2 | 1 | 2014 | An Optimized FFT-Based Direct Poisson Solver on CUDA GPUs · IEEE Trans. Parallel Distributed Syst. 2014 |
Memory systems
memory hierarchy |
0.1 | 1 | 2014 | An Optimized FFT-Based Direct Poisson Solver on CUDA GPUs · IEEE Trans. Parallel Distributed Syst. 2014 |
Methods — techniques the papers use, named apart from their topics
register-level computation · 0.2memory coalescing · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2014 | Optimized FFT computations on heterogeneous platforms with application to the Poisson equation
Jing Wu 0007, Joseph F. JáJá |
J. Parallel Distributed Comput. | 1 |
| 2014 | An Optimized FFT-Based Direct Poisson Solver on CUDA GPUsabstractA highly multithreaded FFT-based direct Poisson solver that makes effective use of the capabilities of the current NVIDIA graphics processing units (GPUs) is presented. Our algorithms carefully manage the multiple layers of the memory hierarchy of the GPUs such that almost all the global memory accesses are coalesced into 128-byte device memory transactions, and all computations are carried out directly on the registers. A new strategy to interleave the FFT computation along each dimension with other computations is used to minimize the total number of accesses to the 3D grid. We illustrate the performance of our algorithms on the NVIDIA Tesla and Fermi architectures for a wide range of grid sizes, up to the largest size that can fit on the device memory ($(512\times 512\times 512)$ on the Tesla C1060/C2050 and $(512\times 256\times 256)$ on the GeForce GTX 280/480). We achieve up to 140 GFLOPS and a bandwidth of 70 GB/s on the Tesla C1060, and up to 375 GFLOPS with a bandwidth of 120GB/s on the GTX 480. The performance of our algorithms is superior to what can be achieved using the CUDA FFT library in combination with well-known parallel algorithms for solving tridiagonal linear systems of equations. Jing Wu 0007, Joseph F. JáJá, Elias Balaras |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2013 | High Performance FFT Based Poisson Solver on a CPU-GPU Heterogeneous PlatformabstractWe develop an optimized FFT based Poisson solver on a CPU-GPU heterogeneous platform for the case when the input is too large to fit on the GPU global memory. The solver involves memory bound computations such as 3D FFT in which the large 3D data may have to be transferred over the PCIe bus several times during the computation. We develop a new strategy to decompose and allocate the computation between the GPU and the CPU such that the 3D data is transferred only once to the device memory, and the executions of the GPU kernels are almost completely overlapped with the PCI data transfer. We were able to achieve significantly better performance than what has been reported in previous related work, including over 50 GFLOPS for the three periodic boundary conditions, and over 40 GFLOPS for the two periodic, one Neumann boundary conditions. The PCIe bus bandwidth achieved is over 5GB/s, which is close to the best possible on our platform. For all the cases tested, the single 3D PCIe transfer time, which constitutes a lower bound on what is possible on our platform, takes almost 70% of the total execution time of the Poisson solver. Jing Wu 0007, Joseph F. JáJá |
IPDPS | 1 |