Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page
Demo Data from EDBT 2026 / reviewers in the wild / expert

Jian-tu Hsieh

dblp:88/374 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 1985
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › latency hiding
decoupled architecture		 0.011985
PIPE: A VLSI Decoupled Architecture · ISCA 1985
Processor architecture and microarchitecture
VLSI processor		 0.011985
PIPE: A VLSI Decoupled Architecture · ISCA 1985
Processor architecture and microarchitecture
instruction-level parallelism		 0.011985
PIPE: A VLSI Decoupled Architecture · ISCA 1985
YearPublicationVenuePosition
1985 PIPE: A VLSI Decoupled Architecture
abstract
article Free Access Share on PIPE: a VLSI decoupled architecture Authors: J. R. Goodman The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WI The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WIView Profile , Jian-tu Hsieh The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WI The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WIView Profile , Koujuch Liou The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WI The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WIView Profile , Andrew R. Pleszkun The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WI The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WIView Profile , P. B. Schechter The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WI The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WIView Profile , Honesty C. Young The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WI The University of Wisconsin-Madison, Computer Sciences Department, 1210 W. Dayton St., Madison, WIView Profile Authors Info & Claims ACM SIGARCH Computer Architecture NewsVolume 13Issue 3June 1985 pp 20–27https://doi.org/10.1145/327070.327117Published:01 June 1985Publication History 101citation592DownloadsMetricsTotal Citations101Total Downloads592Last 12 Months50Last 6 weeks13 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
James R. Goodman, Jian-tu Hsieh, Koujuch Liou, Andrew R. Pleszkun, P. B. Schechter, Honesty C. Young
 ISCA2