EDBT 2026 Demo / reviewers in the wild / expert
Frederico C. Vagliani
dblp:88/456
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1995
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
1 paper |
Physical-layer communications · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Physical-layer communications › modulation › multicarrier modulation
OFDM |
0.0 | 1 | 1995 | An OFDM Scheme with a half Complexity · IEEE J. Sel. Areas Commun. 1995 |
Physical-layer communications › signal processing for communications
polyphase network |
0.0 | 1 | 1995 | An OFDM Scheme with a half Complexity · IEEE J. Sel. Areas Commun. 1995 |
Methods — techniques the papers use, named apart from their topics
complexity analysis · 0.0architecture design · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1995 | An OFDM Scheme with a half ComplexityabstractThe paper deals with an OFDM (orthogonal frequency division multiplexing) system based on filter-bank architecture. The known implementation uses a DFT (discrete Fourier transform) processor and a polyphase network (PPN). Even if it is based on complex components, in the final step it operates the real part extraction of the incoming signal. This leads to redundant operations in the DFT processor and in the PPN. Specifically, for the transmission of N complex symbol sequences at a given rate ½F, an N-point DFT processor and an N-branch PPN, both working at the rate F, are required. This implementation can be improved with a complexity reduction by a factor of two. In fact, in the paper an architecture is presented based on an N-point DFT processor and N-branch PPN at the rate F, for the transmission of 2N (in place of N) complex symbol sequences at the rate ½F Gianfranco L. Cariolaro, Frederico C. Vagliani |
IEEE J. Sel. Areas Commun. | 2 |