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Jay C. Majithia

dblp:88/5288 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 96% Integrated circuit design · 4%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › logic synthesis › decision diagrams
binary decision diagram
0.011996
Suggestion for a New Representation for Binary Function · IEEE Trans. Computers 1996
Electronic design automation › logic synthesis
boolean function representation
0.011996
Suggestion for a New Representation for Binary Function · IEEE Trans. Computers 1996
Electronic design automation
logic synthesis
0.011996
Suggestion for a New Representation for Binary Function · IEEE Trans. Computers 1996
Integrated circuit design › digital circuit design
arithmetic circuit design
0.011973
A Cellular Array for Binary to BCD Conversion · IEEE Trans. Computers 1973
Integrated circuit design › VLSI design
cellular array
0.011973
A Cellular Array for Binary to BCD Conversion · IEEE Trans. Computers 1973
Integrated circuit design
digital circuit design
0.011973
A Cellular Array for Binary to BCD Conversion · IEEE Trans. Computers 1973

Methods — techniques the papers use, named apart from their topics

nested multiplication · 0.0
YearPublicationVenuePosition
1996 Suggestion for a New Representation for Binary Function
abstract
The widely used method for Boolean function representation, called binary decision diagram (BDD), and its variation, the ordered binary decision diagram (OBDD), occasionally become time and space consuming for efficient manipulations with increase of number of its input variables. It would appear intuitively that a more efficient approach can be derived by viewing the function from the perspective of its output values. In this paper, such an approach based on the concept of input implicit/output explicit representation is developed. These output value array graphs (OVAGs) are derived for some sample circuits to illustrate their compact size. These are, however, preliminary results and additional research is needed to fully demonstrate the usefulness of OVAGs.
Honghai Jiang, Jay C. Majithia
IEEE Trans. Computers2
1973 A Cellular Array for Binary to BCD Conversion
abstract
A repeated application of nested multiplication by ten yields an extremely simple method for binary to binary-coded decimal (BCD) conversion where the input is a binary fraction. This technique can be implemented in a cellular array or in a serial system using an adder and storage register. The cellular array is, however, a faster method and can be implemented with available circuits.
Jay C. Majithia
IEEE Trans. Computers1