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Y. Ohkura

dblp:89/1721 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 67% Electronic design automation · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design
device simulation		 0.011987
Analysis of MOSFET Capacitances and Their Behavior at Short-Channel Lengths Using an AC Device Simulator · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Integrated circuit design › analog and mixed-signal circuits › device modeling
MOS capacitance model		 0.011987
Analysis of MOSFET Capacitances and Their Behavior at Short-Channel Lengths Using an AC Device Simulator · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Integrated circuit design › semiconductor devices
short-channel effects		 0.011987
Analysis of MOSFET Capacitances and Their Behavior at Short-Channel Lengths Using an AC Device Simulator · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987

Methods — techniques the papers use, named apart from their topics

AC device simulation · 0.0
YearPublicationVenuePosition
1987 Analysis of MOSFET Capacitances and Their Behavior at Short-Channel Lengths Using an AC Device Simulator
abstract
Intrinsic MOSFET capacitances are calculated using the three-dimensional ac device simulator CADDETH, and distributions of the internal ac currents are studied. The simulations clearly show the influence of velocity saturation. Finally short-channel effects on the intrinsic MOSFET capacitances are analyzed.
Y. Ohkura, Toru Toyabe, H. Masuda
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1