Bret Wallach

dblp:89/1804 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 30% Parallel and multicore computing · 30% High-performance computing · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing › parallel numerical algorithms
parallel signal processing
0.011993
Bispectrum signal processing on HNC's SIMD numerical array processor (SNAP) · SC 1993
Storage systems
signal processing
0.011993
Bispectrum signal processing on HNC's SIMD numerical array processor (SNAP) · SC 1993
Parallel and multicore computing › array processor
SIMD processor array
0.011993
Bispectrum signal processing on HNC's SIMD numerical array processor (SNAP) · SC 1993
Processor architecture and microarchitecture
SIMD
0.011993
Bispectrum signal processing on HNC's SIMD numerical array processor (SNAP) · SC 1993

Methods — techniques the papers use, named apart from their topics

SIMD array processing · 0.0
YearPublicationVenuePosition
1993 Bispectrum signal processing on HNC's SIMD numerical array processor (SNAP)
abstract
The bispectrum is a processing technique that can be used for improving the detection of signals in noise. It is an order N/sup 2/ operation performed over a two dimensional frequency plane and, because of computational demands, has not been used much in practice. HNC has developed a commercially available SIMD numerical array processor (SNAP) and implemented Tracor's computationally demanding bispectrum signal processing code as a submission for the Gordon Bell prize. The SNAP is a SIMD array of parallel processors connected in a linear ring. A SNAP system with 32 processors (SNAP-32) demonstrated a performance of over 7.5 GIGAFLOP per million dollars.
Robert W. Means, Bret Wallach, David Busby
SC2