Shumpei Kawasaki

dblp:89/2678 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1986
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
instruction set architecture
0.011986
Microprogrammable Processor for Object-Oriented Architecture · ISCA 1986
Processor architecture and microarchitecture › microprogramming
microprogrammable processor
0.011986
Microprogrammable Processor for Object-Oriented Architecture · ISCA 1986
Processor architecture and microarchitecture › instruction set architecture › high-level language architecture
object-oriented architecture
0.011986
Microprogrammable Processor for Object-Oriented Architecture · ISCA 1986

Methods — techniques the papers use, named apart from their topics

tag-handling mechanism · 0.0microprogramming · 0.0activation record allocation · 0.0
YearPublicationVenuePosition
1986 Microprogrammable Processor for Object-Oriented Architecture
abstract
An advanced microprocessor has been developed for the high performance execution of object oriented language programs. In object oriented languages, improvement of frequent or complex operations such as dynamic type checking, procedure calls, and storage management, contributes toward the increase of overall performance. In order to improve their performance, the microprocessor adopts large on-chip register files, a large EPROM for microstore, and ingenious instruction dispatching and tag-handling mechanisms. By specially treating frequently accessed data, i.e., allocating activation records in register files, much of the data traffic can be effectively localized within the chip, and the complexity of procedure calls as well as the burden imposed on storage management can be alleviated. The tag-handling mechanisms efficiently perform dynamic type checking. As the result, the microprocessor, together with an efficient microprogram, executes object oriented language programs much faster than existing computers. Furthermore, it can efficiently execute other high-level languages by using corresponding microprograms, especially AI-languages.
Tohru Nojiri, Shumpei Kawasaki, Kousuke Sakoda
ISCA2