Due to rapid advancements on the Internet of Things (IoT), unmanned aerial vehicles (UAVs), also known as drones, are transforming numerous military and civil application areas. UAVs aim to enhance the production efficiency, ensure safety, and reduce risk, particularly protecting the human workforce in the case of harsh and dangerous environments. Due to the mission-critical, business-critical, or safety-critical nature of the UAV applications, it is pivotal that UAVs perform reliably to deliver the required service during the intended mission time. Therefore, reliability is one of the essential requirements for designing and operating UAVs. This article presents a critical review of UAV reliability literature in both theoretical and practical research, pinpointing failure causes and reliability challenges of UAV systems, classifying and reflecting on the reliability modeling, analysis, and design methods for UAV systems and key subsystems. Some open research problems and opportunities are also discussed to highlight potential new challenges for designing reliable and resilient UAVs and UAV-assisted IoT systems.

Life critical applications like space missions and flight controls require their computing systems to be equipped with some fault-tolerance mechanism to meet stringent reliability requirements by performing the intended function even in the case of element failures. Such benefit, however, cannot come without extra time as well as extra overhead and capital costs. This paper for the first time considers the modeling and evaluation of mission reliability, expected mission time and cost simultaneously for 1-out-of-$N$: G non-repairable cold standby computing systems subject to periodic backup actions. Based on the suggested numerical evaluation method, the optimal backup frequency problems are formulated and solved, providing the optimal number of backup operations during the mission to maximize the system reliability or to minimize the mission cost or time. In the case of non-identical system elements, the optimal standby element sequencing problem arises as the order in which the system elements are initiated can impact the system reliability and mission cost and time greatly; such problems are formulated and solved for the 1-out-of-$N$: G cold standby computing systems with periodic backups. Furthermore, a combined optimization problem is considered, where a combination of the element initiation sequence and backup frequency providing the best combination of mission reliability, cost, and time is found. The proposed methodology can facilitate a reliability-cost-time tradeoff study in the practical design of cold standby systems, thus assist in making the optimal decision on the system's standby and backup policy. Examples are provided for illustrating the considered problems and suggested solution methodology.

Existing nuclear power generation facilities are currently seeking to replace obsolete analog Instrumentation and Control (I&C) systems with contemporary digital and processor based systems. However, as new technology is introduced into existing and new plants, it becomes vital to assess the impact of that technology on plant safety. From a regulatory point of view, the introduction or consideration of new digital I&C systems into nuclear power plants raises concerns regarding the possibility that the fielding of these I&C systems may introduce unknown or unanticipated failure modes. In this paper, we present a fault injection based safety assessment methodology that was applied to a commercial safety grade digital Reactor Protection System. Approximately 10,000 fault injections were applied to the system. This paper presents a overview of the research effort, lessons learned, and the results of the endeavor.

Semiconductor devices are becoming more susceptible to single event upsets (SEUs) as device dimensions, operating voltages and frequencies are scaled. The majority of architecture-, logic- and circuit-level techniques that have been developed to address SEUs in logic assume a single-point fault model. This will soon be insufficient as the occurrence of spatial multi-bit errors is becoming prevalent in highly scaled devices. In this paper, we explore this new fault model and evaluate the effectiveness of conventional fault tolerance techniques to mitigate such faults. We also extend the idea of bit interleaving in memory to logic bit slices and explore its utility as an approach to spatial multi-bit error mitigation in logic. We present a comparison of these techniques using a case study of a Brent-Kung adder at a 90-nm process.

Transient faults (also known as soft-errors) resulting from high-energy particle strikes on silicon are typically modeled as single bit-flips in memory arrays. Most Architectural Vulnerability Factor (AVF) analyses assume this model. However, accelerated radiation tests on static random access memory (SRAM) arrays built using modern technologies show evidence of clustered upsets resulting from single particle strikes. In this paper, these observations are used to define a scalable fault model capable of representing fault multiplicities. Applying this model, a probabilistic framework for incorporating vulnerability of SRAM arrays to different fault multiplicities into AVF is proposed. An experimental fault injection setup using a detailed microarchitecture simulation running generic benchmarks was used to demonstrate vulnerability characterization in light of the new fault model. Further, rigorous fault injection is used to demonstrate that conventional methods of AVF estimation overestimate vulnerability up to 7× for some structures.

The software fault failure rate bound is discussed and generalized for different reliability growth models. The fault introduction during testing and the fault removal efficiency are modeled to relax the two common assumptions made in software reliability models. Three approaches are introduced for the fault content estimation, and thus they are applied to software coverage estimation. A three-state nonhomogenous Markov model is constructed for software safety assessment. The two most important metrics for safety assessment, Steady State Safety and MTTUF, are estimated using the three-state Markov model. A case study is conducted to verify the theory proposed in the paper.

Metrics are commonly used in engineering as measures of the performance of a system for a given attribute. For instance, in the assessment of fault tolerant systems, metrics such as the reliability, R(t) and the Mean Time To Failure (MTTF) are well-accepted as a means to quantify the fault tolerant attributes of a system with an associated failure rate, /spl lambda/. Unfortunately, there does not seem to be a consensus on comparable metrics to use in the assessment of safety-critical systems. The objective of this paper is to develop two metrics that can be used in the assessment of safety-critical systems, the steady-state safety, S/sub ss/, and the Mean Time To Unsafe Failure (MTTUF). S/sub ss/ represents the evaluation of the safety as a function of time, in the limiting case as time approaches infinity. The MTTUF represents the average or mean time that a system will operate safely before a failure that produces an unsafe system state. A 3-state Markov model is used to model a safety-critical system with the transition rates computed as a function of the system coverage C/sub sys/, and the hazard rate /spl lambda/(t). Also, /spl lambda/(t) is defined by the Weibull distribution, primarily because it allows one to easily represent the scenarios where the failure rate is increasing, decreasing, and constant. The results of the paper demonstrate that conservative estimates for lower bounds for both S/sub ss/ & the MTTUF result when C/sub sys/ is assumed to be a constant regardless of the behavior of /spl lambda/(t). The derived results are then used to evaluate three example systems.

The existing classes of fault coverage models require an a priori distribution for collected data in their analysis. Using these models, analyses can be performed using various assumed distributions. The assumed distributions may not accurately reflect the behavior of the collected data and, as a result, the coverage values predicted by the models may be inaccurate, especially if testing yields little or no failure data. Since the occurrence of an uncovered fault in an ultra-dependable system is a rare event, then statistics of the extremes can be used to quantify uncoverage estimates in such systems. Statistics of the extremes provides for an analysis of rare event data without requiring any a priori knowledge of its distribution. It classifies most distributions into one of three asymptotic families; that is, in the limit, most distributions converge to one of three forms. Using statistics of the extremes, a coverage model is developed for when testing reveals no failures. From this model, the number of fault injection experiments required to demonstrate that a desired coverage level can be met is derived, as is the probability that this coverage estimate can be met.

This paper proposes new fault models for VHDL behavioral descriptions of combinational logic circuits. The models are developed via abstraction of industry standard single-stuck-line (SSL) faults into the behavioral domain. A functional analysis technique is used to evaluate the effects of SSL faults on gate level implementations. Generalized functional faults are then abstracted into the behavioral domain by examining their relationship with the higher level language construct. Test vectors derived from the new behavioral fault models are applied to synthesized gate level realizations of an example arithmetic logic unit. Resulting gate level fault coverage is determined and used as a measure of effectiveness for the new fault models. Because the behavioral faults are derived from a functional analysis of low level faults, they provide improved fault coverage over previous fault models.

Software reliability models have been successfully applied to many industrial applications, but have the unfortunate drawback of requiring data from which one can formulate a model. The data used for these models frequently comes from pre-release testing and/or field experience, and is of sufficient quantity and quality for most large-scale commercial applications. Software which is developed for safety-critical applications is frequently unable to produce such data, for at least two reasons. First, the software is frequently one-of-a-kind, and second, it rarely fails. Safety-critical software is expected to pass every test, producing precious little failure data. "Statistics of the extremes" is a special branch of statistics developed for analysis of rare events. Where traditional statistical analysis uses the law of large numbers to provide information concerning points which are near the mean of the distribution, statistics of the extremes concentrates on the tails. Analysis of rare event data using statistics of the extremes does not require a-priori assumptions concerning the distributional form of the data, and thus provides an interesting alternative to traditional approaches. In this paper, we develop a software reliability model using statistics of the extremes, which is particularly applicable to safety-critical software systems.

This paper presents an integrated design environment thatsupports the design and analysis of digital systems from initialconcept to the final implementation. The environment supports bothsystem level performance and dependability analysis from acommon modeling representation. A tool called ADEPT (AdvancedDesign Environment Prototype Tool) has been developed toimplement the environment. ADEPT is based on IEEE 1076 VHDLand uses commercial schematic capture systems as a front end viaan EDIF interface. Several examples are presented whichdemonstrate various aspects of the environment.

The size and complexity of modern dependable computing systems has significantly compromised the ability to accurately measure system dependability attributes such as fault coverage and fault latency. Fault injection is one approach for the evaluation of dependability metrics. Unfortunately, fault injection techniques are difficult to apply because the size of the fault set is essentially infinite. Current techniques select faults randomly resulting in many fault injection experiments which do not yield any useful information. This research effort has developed a new deterministic, automated dependability evaluation technique using fault injection. The primary objective of this research effort was the development and implementation of algorithms which generate a fault set which fully exercises the fault detection and fault processing aspects of the system. The theory supporting the developed algorithms is presented first. Next, a conceptual overview of the developed algorithms is followed by the implementation details of the algorithms. The last section of this paper presents experimental results gathered via simulation-based fault injection of an Interlocking Control System (ICS). The end result is a deterministic, automated method for accurately evaluating complex dependable computing systems using fault injection.

A novel methodology is presented which allows the creation of implementation-independent functional models of systems. The methodology uses the VHSIC (very high speed integrated circuit) hardware description language (VHDL) which leads to the possibility of creating a unified design environment supporting system modeling at various stages of the design process. The motivation for the methodology was to assist in the analysis and specification of the WM computer architecture. An implementation-independent model of the WM architecture is provided which is intended as a first step in the development of an implementation. Additionally, architectural performance measures can be extracted from simulations using the model. The model can also serve as an architectural specification for the WM computer.>

A means for analyzing the faulty behavior of neural networks is presented. Using an analogy between statistical physics and neural networks, a method for assessing the performance of a synchronous neural network model in the presence of faults is developed. Analytical predictions are computed using the statistical physics analogy and compared with the simulated behavior for two neuron models. An example of the analytical technique applied to an autoassociative memory is described.>

A technique using genetic algorithms is presented for the generation of compact test sets for combinational VLSI circuits. The technique combines a previously proven method for random test pattern generation with adaptive searching capabilities to produce high-quality test sets. A series of experiments demonstrated that the technique performed consistently better than the traditional method. On average, the method is able to produce test sets that are approximately 20% smaller than the starting configuration. To place this in perspective, its solutions are on average 13% more compact than those produced by a traditional method with no loss in fault coverage.>

A concurrent error detection and design for testability technique based on conservative logic is presented. The theoretical derivations and experimental results show that conservative logic provides inherent support for concurrent error detection, and the resulting circuits can be tested using only two test patterns, independent of the function performed by the circuit. The background definitions are presented, and the fundamental conservative logic theory is developed. Several example designs of adder and multiplier circuits are presented and analyzed to illustrate the developed theory. A possible implementation of a conservative logic gate is presented, and its use in a VLSI circuit is described. The resulting circuit has been fabricated using the MOSIS process. The primary disadvantage of the approach is shown to be the implementation technology.>

Analysis approaches that can be used in the design of computer-based systems for medical applications are described. The major contributions are the definition of safety and the development of analysis techniques which allow safety to be quantified. The results presented are of particular importance in medical applications where the inappropriate operation of the computer system can be catastrophic. A microprocessor-based controller developed for an electric wheelchair is described and used as an example to illustrate the basic concepts and modeling techniques. The results demonstrate that reliability considerations alone are insufficient to evaluate the effectiveness of a given design; safety must also be considered to ensure that the best design is selected for a given application.>