A method for de-embedding the scattering parameters matrix for single-end or differential through, buried, and blind via holes in multilayer printed circuit boards for high-speed digital applications is presented. The proposed technique starts from a measurement or simulation of the structure containing the discontinuity and, after the structure's partitioning, extracts the scattering parameters of the required discontinuity. The procedure is applied to different kinds of single-ended and differential via holes and is validated by measurements. The finite integration technique is used to perform the needed three-dimensional electromagnetic simulations. Due to its reduced CPU time, the proposed methodology is suitable for a parametric analysis on the electrical performance of the via hole discontinuities and it gives useful results for the extraction of accurate computer-aided design models.

ELECTROMAGNETIC compatibility (EMC) is the engineering of electronic components and systems to ensure the overall functioning in a complex electromagnetic environment. Historically, this has included many aspects of the design, such as compliance with electromagnetic interference (EMI) regulatory standards, and insuring immunity of electronics to the electrical noise, i.e., interference generated by a neighboring system or external source. Electrostatic discharge (ESD) is one aspect of electronic immunity that can lead to failure at the IC, module, or system level that is again becoming a major concern in electronic design. EMC has traditionally also included wave-shaping and ensuring signal fidelity, as well as design of an adequately low-noise power distribution network to minimize EMI, and not compromise signal fidelity. Historically, EMC has been characterized as a “copper-tape-and-ferrites,” trial-and-error discipline that reflects a postdesign approach to EMC. As design cycles have decreased, this approach to EMC has changed dramatically over the course of the past five to seven years. Within the commercial electronics community, the need and demand for EMC computer-aided design tools grew as rapidly as the design cycles decreased, and the complexity and data rates of designs increased. However, suitable tools had not been developed and, inmany cases, the underlying noise coupling and immunity physics were not well understood. In large part, this state of affairs resulted from a lack of funding for more basic research and CAD tool development, and the complexity of the problem. The immediate demand for sophisticated EMC design tools that were undeveloped gave rise to focused research in EMC to understand the coupling physics and develop design methodologies and tools in industry and academia alike. Many individual companies have made significant investments in in-house EMC research, as well as funding of university research. The demand for a basic understanding of interference coupling physics, as well as design approaches and tools led to the development of focused EMC research within the UMR EMCConsortium at the University of Missouri-Rolla, as well as a significant research emphasis in other electronics and packaging centers such as the Packaging Research Center at Georgia Tech and the CALCE Electronic Products and Research Center at the University of Maryland. The field of EMC has grown into a number of specialty areas, in particular, in the past five years, which reflects the present challenges associated with electronic design. This has resulted in part from increasing data rates and clock frequencies, decreasing logic levels resulting from increased power requirements, decreasing design densities, mixedsignal analog/digital designs within the same package, and higher frequency switching power supplies, among a host of other issues. There is still a significant need for a basic understanding of EMC in many aspects of high-speed digital and mixed-signal design including EMI (including radio-frequency interference (RFI)), immunity (including ESD), signal integrity (SI), and power integrity, in particular, at the IC, and IC substrate and packaging level. In addition, the need for modeling approaches and CAD tools in all areas of electromagnetic compatibility is acute. In an engineering design environment, the models and tools must be suitable for rapid computation and be within the expertise of a component or system designer to use. In practice, this reduces to circuit and transmission-line modeling, i.e., the typical SPICE-type environment. The performance of first-pass engineering design validation hardware is often plagued by undesirable parasitics that compromise the signal fidelity and/or level, and dominate the coupling in the case of EMI and immunity. The coupling is through the electric field (capacitive coupling), magnetic field (inductive coupling), or through a common current return path, intended or unintended. In short, EMC is “about the things that are not on the circuit schematic,” i.e., parasitic effects. There is a critical need for design methodologies and CAD tools that are based on well-understood parasitic effects and coupling physics, and can anticipate or extract suitable parasitic lumped circuit element models from a layout geometry. Presently, there are no such mature CAD tools. There are well-developed tools for the numerical solution of Maxwell’s equations, RF circuit design tools, and circuit simulation tools. However, tools for anticipating parasitic effects are predominantly still at a beginning stage of development. To use a literature analogy, the complexity of the problem demands a solution with the sophistication of Tolstoy, but the available tools are at a grade-school primer stage of development. Among the most challenging of electronics designs for EMC are those associated with mobile computing. These designs are typically battery powered with no real-time generation, and are low-power. In addition, the designs IEEE TRANSACTIONS ON MOBILE COMPUTING, VOL. 2, NO. 4, OCTOBER-DECEMBER 2003 273