EDBT 2026 Demo / reviewers in the wild / expert
John C. Becker
dblp:90/1182
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1975
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 77% Memory systems · 23% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital circuit design |
0.0 | 1 | 1975 | Multiplication Using Logarithms Implemented with Read-Only Memory · IEEE Trans. Computers 1975 |
Memory systems › non-volatile memory
read-only memory |
0.0 | 1 | 1975 | Multiplication Using Logarithms Implemented with Read-Only Memory · IEEE Trans. Computers 1975 |
Methods — techniques the papers use, named apart from their topics
logarithm tables · 0.0ROM design · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1975 | Multiplication Using Logarithms Implemented with Read-Only MemoryabstractA method for designing the read-only memories (ROM's) needed for multiplication using logarithms is developed. By defining the word length of the multiplicand, multiplier, and product as n bits and the word length of -the rounded logarithms as m bits, design curves are given that allow various values of n and m to be selected for a given multiplier accuracy. Then a table is used to determine, which combination results in an implementation with the least number of bits. Thomas A. Brubaker, John C. Becker |
IEEE Trans. Computers | 2 |