This paper presents a 915 MHz ultra-low-power (ULP) receiver based on a single-path third-harmonic mixing (SPTHM) architecture. Unlike conventional multi-path sub-harmonic receivers that require precise multi-phase local oscillators (LOs), this work simplifies the receiver to a single-mixer path architecture by jointly optimizing the LO harmonic order and duty cycle. The receiver is driven by a 10%-duty-cycle LO operating at one-third of the carrier frequency ($f_{\mathrm {c}}$). Compared to the typical 50%-duty-cycle LO in the SPTHM configuration, the proposed receiver improves the conversion gain by 12.1 dB and noise figure (NF) by 5.2 dB. The architecture also exhibits a front-end NF variation of less than 1 dB across the 3%-13% LO duty-cycle range, thereby relaxing constraints on pulse generation. To facilitate ULP channel selection, a comparison-skipped frequency-locked loop (FLL) is used, consuming just$5~\mu $W. A high-Q IF amplifier with an improved active inductor load is incorporated to enhance in-band interference rejection, achieving 31 dB signal-to-interference ratio (SIR) at 5 MHz offset. Fabricated in a 65 nm CMOS, the receiver achieves a sensitivity of −86 dBm at 250 kbps data rate with a$39.4~\mu $W power consumption, including an on-chip LO. It indicates a competitive figure-of-merit (FoM) of 184 dB within a compact active area of 0.16 mm2.

This brief presents a reconfigurable multichannel noise-shaping (NS) SAR analog-to-digital converter (ADC) with crosstalk suppression. All nonmemory blocks are multiplexed among all channels assisted by the proposed timing control scheme, enabling reconfiguration with negligible power and hardware cost. A novel approach to determine the design parameters of nonideal loop filters is proposed, and a crosstalk suppressed multichannel fully passive loop filter is developed based on this method. A memoryless binary dynamic element matching (DEM) is also adopted to suppress the nonlinearity of each channel. The ADC achieves a typical SNDR of 77.49/72.17/66.62 dB with a 20-kHz bandwidth under one-/two-/four-channel modes, respectively, realizing typical Schreier FoMs of 169.54, 167.20, and 164.64 dB. Averaged interchannel crosstalks are −79.17 and −77.37 dB with −2.5-dBFS inputs in all input channels under two- and four-channel modes.

This paper presents a 915MHz multi-channel receiver for ultra-low-power (ULP) applications. A sub-passive third-harmonic mixer is proposed to improve the front-end conversion performance at the ULP budget. Driven by the local oscillator (LO) that operates at one-third of the RF carrier frequency with a duty cycle of about 10%, the proposed mixer improves the front-end’s noise figure (NF) to 15dB while reducing the LO power consumption by three times. The mixer also alleviates the requirement for LO phase accuracy. With the LO duty cycle ranging from 4% to 14%, the variation of the mixer performance is less than 10%, which allows a simple pulse generation approach without a precise duty cycle control circuit, thereby saving power consumption. A low-power frequency-locked loop (FLL) with a 196kHz tuning step facilitates channel selection. Additionally, a high-Q intermediate-frequency (IF) amplifier with an active inductor is used to suppress in-band interference and noise bandwidth. Implemented in a 65nm CMOS process and based on post-simulation results, the receiver achieves a sensitivity of −88dBm while consuming 40µW at a 250kb/s data rate. The receiver also performs an improved figure-of-merit (FoM) of 186dB with 26dB interference tolerance and a compact active area of 0.16mm2.

This paper presents a 915MHz bit-level duty-cycled (BLDC) wake-up receiver (WuRX) designed for ultra-low-power Internet-of-Things (IoT) systems. Utilizing an envelope-tracking (ET) mixer, the WuRX generates a phase-following (PF) local oscillator (LO) from the incoming radio-frequency (RF) signals. The recovered PF LO has a low duty cycle of about 10% and aligns the peak and valley voltages of the RF signal. As a result, the on-off keying data is accurately downconverted to the baseband with improved gain. Moreover, the high-speed sampling capability of the ET mixer allows the receiver’s front-end to operate at a low duty cycle of 0.024%, significantly lower than other mixer-based BLDC WuRXs. Dynamic baseband amplifiers with pre-charging and auto-zeroing abilities are employed to save area and reduce power consumption. Fabricated in a 65nm CMOS process, the proposed BLDC WuRX achieves a sensitivity of −73.2dBm at a 1kbps data rate, consuming only 97nW and occupying an ultra-low-area of 0.036mm2.

This paper presents an ultra-low-voltage (ULV) and ultra-low-power (ULP) voltage detector (VD) for energy harvesting systems (EHS). The VD is designed using a 2-transistor (2T) voltage detection circuit and a 2T bias circuit. By leveraging two types of transistors with small threshold voltage differences, the detection voltage is reduced to 240 mV, enhancing the feasibility and practicality of the design for ULV EHS. The detection voltage can be programmed by incorporating an appropriate voltage divider into the VD, while the proposed 2T bias technique reduces its variation across different process corners. The design is implemented in a 65 nm CMOS process and occupies a chip area of 260 µm2. Post-layout simulation results indicate that the VD achieves a detection voltage of 240 mV, with a standard deviation (σ) of 6.6 mV, drawing only 5 nA of current at a supply voltage of 0.3 V. The average temperature coefficient (TC) across five process corners is 33.8 µV/°C, simulated within a temperature range of -40 °C to 125 °C.

This brief develops a degradation-based imperfect maintenance policy considering both positive effect and negative effect for a deteriorating system with variations of operating conditions. The proposed method improves the positive effect on the imperfect maintenance, which further considers the impact of resource on the distribution function of the positive effect after each maintenance process. The positive effect induces the system state into a random interval which is related to maintenance resource applied into each preventive maintenance action and actual maintenance times. Meanwhile, a new negative deteriorating effect model for describing the impacts of imperfect maintenance actions is established. The new model considers that the degradation rate increases after each imperfect maintenance process; meanwhile, it includes the impacts of variations of operating condition bringing to the degradation rate which is described as a distribution subjected to stress as well. Therefore, a condition-based adaptive maintenance policy is applied for a deteriorating system. The optimal maintenance cost allocation and maintenance threshold are determined by maximizing an availability function. Finally, a numerical example is illustrated to demonstrate the application of our maintenance model and policy.

Serious sealing problems cause premature retirement of Lithium-ion punch cells in the service stage. This paper mainly investigates the sealing failure behavior of Li-ion punch cell. A non-linear peeling model was established with experimental verification to explain the failure behavior of sealing cohesive zone. Based on the peeling model, a sealing life prediction method is proposed by describing the decrease of key parameters (σ̂, δc) in the force peeling model. Besides, the accelerated degradation test was conducted for acquiring parameters of life prediction model. Finally, a commercial Li-ion punch cell illustrated is used to validate our method. The result shows that our method can provide a significant reference for the sealing life prediction of Li-ion pouch cell working in different variable loads.