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Erez Tsidon

dblp:91/11342 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Network measurement and analytics · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Network measurement and analytics › sketch-based measurement
counter estimation
0.112012
Estimators also need shared values to grow together · INFOCOM 2012
Network measurement and analytics
traffic measurement
0.112012
Estimators also need shared values to grow together · INFOCOM 2012
Performance modeling and evaluation
benchmarking
0.012012
Estimators also need shared values to grow together · INFOCOM 2012

Methods — techniques the papers use, named apart from their topics

FPGA implementation · 0.3CEDAR algorithm · 0.3
YearPublicationVenuePosition
2012 Estimators also need shared values to grow together
abstract
Network management applications require large numbers of counters in order to collect traffic characteristics for each network flow. However, these counters often barely fit into on-chip SRAM memories. Past papers have proposed using counter estimators instead, thus trading off counter precision for a lower number of bits. But these estimators do not achieve optimal estimation error, and cannot always scale to arbitrary counter values. In this paper, we introduce the CEDAR algorithm for decoupling the counter estimators from their estimation values, which are quantized into estimation levels and shared among many estimators. These decoupled and shared estimation values enable us to easily adjust them without needing to go through all the counters. We demonstrate how our CEDAR scheme achieves the min-max relative error, i.e., can guarantee the best possible relative error over the entire counter scale. We also explain how to use dynamic adaptive estimation values in order to support counter up-scaling and adjust the estimation error depending on the current maximal counter. Finally we implement CEDAR on FPGA and explain how it can run at line rate. We further analyze its performance and size requirements.
Erez Tsidon, Iddo Hanniel, Isaac Keslassy
INFOCOM1