In this paper, a silicon compiler for analog fuzzy controllers is described. The layout is generated automatically, starting from global-system specifications accepted as a set of classical fuzzy rules involving fuzzy sets as well as numerical data, often available from numerical examples. The system relies on a library of basic cells designed using a CMOS n-well 0.7 /spl mu/m technology and on the use of Cadence software. Multi-inputs multi-outputs fuzzy logic-based controllers are synthesized, and the area and power requirements by any specific application are optimized. Some prototypes designed using the proposed methodology have been fabricated. For example, a two-inputs two-outputs fuzzy controller implementing a 2D rational function and a sinusoidal function requires, including the I/O circuitry, 1.9 mm/sup 2/ of silicon area, and the total power consumption is 44 mW at 5 V power supply. The maximum propagation delay, assuming a step input function, is 0.57 /spl mu/sec. The total computation time using a SUN Sparc2 Workstation is about 25 min, from specification of the expected behavior to layout.

In this work we investigate techniques for embedding domain-specific spatial invariances into highly-constrained neural networks. This information is used to drastically reduce the number of weights which have to be determined during the learning phase, thus allowing us to apply artificial neural networks to problems characterized by a relatively small number of available examples. As an application of the proposed methodology, we study the problem of optical inspection of machined parts. More specifically, we have characterized the performance of a network created according to this strategy, which accepts images of parts under inspection at its input and issues a flag at its output which states whether the part is defective. The results obtained so far show that the proposed methodology provides a potentially relevant approach for the quality control of industrial parts, as it offers both accuracy and short software development time, when compared with a classifier implemented using a standard approach.

A low-power architecture for 2D-DCT is presented. It has been designed for portable H.261-compliant video-telephone applications, but most of the results and considerations apply to MPEG systems too. The presence of quantization in the coding process has been exploited, adapting the precision of DCT calculations to the quantization noise level. The proposed architecture has the capability of dynamically controlling power consumption by reducing the precision to the minimum required level and turning off sub-systems when they are not necessary for the computation. Compared with a standard implementation, power consumption is reduced by a factor between 7 and 10, without appreciable degradation of the transmission quality.

A new methodology for the minimization of a given set of fuzzy rules is presented. It is based on a novel mapping of fuzzy relations on Boolean functions and exploits existing Boolean synthesis algorithms. In this mapping each fuzzy membership predicate is translated into a Boolean variable and proper constraints on Boolean manipulations are added to guarantee fuzziness translation. The formal consistency of the approach depends on a fuzzy semantic which easily generalizes most of the existing models, granting broad applicability to the suggested procedure. The applicability of an enhanced two-level Boolean minimizer is demonstrated, and the technique is applied to the fuzzy identification of nonlinear systems, consistently reducing the number of rules and easing application of further optimization interventions.>

The problems related to the hydrodynamic simulation of semiconductor devices operating at liquid nitrogen temperature are investigated, with emphasis on the numerical aspects. A discretization strategy is proposed that allows one to incorporate in a conventional hydrodynamic program typical low-temperature effects, such as Fermi statistics and incomplete ionization, as well as proper boundary conditions. The suggested technique has been implemented in the hydrodynamic version of the program HFIELDS, and it has been tested by means of the simulation of a submicron n-channel MOSFET.>

The authors describe the design and implementation of an application-specific digital architecture aimed at the solution in real time of the "K nearest neighbors" algorithm for classification problems, whose computational weight is very high. The system described here is an array-processor architecture in which the data base is split among several units that at the same time apply the same operations to different data stored in local memories. The sustained memory bandwidth of a system featuring 8 units is 2560 Mb/s and it provides a speed-up of 500 times over the software algorithm running on a SUN Sparc2 workstation.>

A spherical-harmonics expansion method is used to find an approximate numerical solution of the Boltzmann transport equation (BTE) in a 1-D semiconductor device including acoustic and optical phonon, ionized impurity, and impact ionization scattering as well as a system of nonparabolic bands fitting the experimental density of states up to 2.6 eV. The method is applied to the simulation of a 1-D BJT and to the computation of the collector current multiplication factor. A comparison with experimental data is presented.>

Classifiers based on the k-nearest neighbors (k-NN) approach have recently received an increasing attention because of their simple implementation and absence of training. In this technique, the similarity measure used to compute the distance between the stored patterns and the test element is the most crucial part of the method. The paper addresses this issue within the context of recognition of hand-written digits. A novel similarity measure is proposed and used to associate a number to each pair of samples in a suitable N-dimensional space in order to define the distance between two handwritten characters. The proposed similarity measure has been parameterized and the best values of these parameters have been evaluated using suitable statistical approaches. Finally, some results obtained from the classification of digits extracted from a ZIP code database are provided.>

A 3-D general-purpose device simulator is presented, and issues related to its geometrical flexibility and computational efficiency are discussed. Triangular-based prismatic elements are used as building blocks for the discretization of device equations, providing a reasonable tradeoff between simplicity and geometrical flexibility. Suitable numerical techniques, including a 'local-solution' algorithm, have been implemented in order to improve the computational efficiency of the code. A general treatment has been devised to handle floating-gate devices, which allows the program to cope with complex structures, such as a dual EPROM structure. Three-dimensional and two-dimensional simulation results are compared.>

An algorithm allowing the automatic generation of a mesh and accounting for the main physical features of the problem is presented. The adaptivity is provided by a refinement strategy which preserves the characteristics of the initial grid, inserting nodes only in the regions where the solution deviates from a linear behavior. A geometrical interpretation in terms of a monitor surface is given, and various different approaches to the problem are discussed. The efficiency of the algorithm is enhanced by a local solution scheme, which uses previously computed values of all the unknown quantities as boundary conditions for the newly generated nodes. A few examples illustrate the performance of the algorithm.>

A discretization scheme is applied to the hydrodynamic model for semiconductor devices that generalizes the Scharfetter-Gummel method to both the momentum-conservation and the energy-conservation equations. The major advantages of the scheme are: (1) the discretization is carried out without neglecting any terms, thus providing a satisfactory description of such effects as velocity overshoot and carrier heating; and (2) the resulting equations lend themselves to a self-consistent solution procedure similar to those currently used to solve the simpler drift-diffusion equations. Two-dimensional steady-state simulations of an n-channel MOSFET and of an n-p-n BJT (bipolar junction transistor) have been carried out by means of an improved version of the program HFIELDS. Carrier-temperature plots have been obtained with a reasonable computational effort, demonstrating the efficiency of this technique. The results have been compared with those obtained with the standard drift-diffusion model and significant differences in the electron concentration have been found, especially at the drain end of the MOSFET channel.>

In this paper we propose a sensitivity-analysis technique for device design. By this method, we determine the linearized variations of the device terminal characteristics following some change either in the impurity distribution, or in device geometry, such as channel length and oxide thickness. This technique has been implemented in our general-purpose two-dimensional device-analysis program (HFIELDS) and proved to be very efficient, as only the assembly of the RHS and one back-substituton is required in order to achieve the final result. It is believed that the present method can be profitably used for both deterministic and statistical device design.