Barrett Hazeltine

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3ranked-venue papers

3as first author

0since 2021 · last 1965

—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorTheory of computation · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems 2 papers		Electronic design automation · 77% Integrated circuit design · 23%
Theoretical computer science 1 paper		Automata and formal languages · 100%

Topics — the 7 heaviest of 7, each with the papers that count most for it

Topic	Papers	Last	Evidence papers
Electronic design automation logic synthesis	2	1965	Encoding of Asynchronous Sequential Circuits · IEEE Trans. Electron. Comput. 1965 Construction of Irredundant Multilevel Switching Functions · IEEE Trans. Electron. Comput. 1964
Electronic design automation › logic synthesis multilevel logic synthesis	1	1964	Construction of Irredundant Multilevel Switching Functions · IEEE Trans. Electron. Comput. 1964
Electronic design automation › logic synthesis state assignment	1	1965	Encoding of Asynchronous Sequential Circuits · IEEE Trans. Electron. Comput. 1965
Automata and formal languages › regular languages regular expressions	1	1963	Regular expressions and variable length encodings (Corresp.) · IEEE Trans. Inf. Theory 1963
Integrated circuit design › digital circuit design › sequential circuit design asynchronous sequential circuits	1	1965	Encoding of Asynchronous Sequential Circuits · IEEE Trans. Electron. Comput. 1965
Integrated circuit design › digital circuit design › logic design logic circuits	2	1965	Encoding of Asynchronous Sequential Circuits · IEEE Trans. Electron. Comput. 1965 Construction of Irredundant Multilevel Switching Functions · IEEE Trans. Electron. Comput. 1964
Integrated circuit design › digital circuit design switching circuits	1	1964	Construction of Irredundant Multilevel Switching Functions · IEEE Trans. Electron. Comput. 1964

Methods — techniques the papers use, named apart from their topics

state assignment · 0.0irredundant function construction · 0.0

Year	Publication	Venue	Position
1965	Encoding of Asynchronous Sequential Circuits Barrett Hazeltine	IEEE Trans. Electron. Comput.	1
1964	Construction of Irredundant Multilevel Switching Functions Barrett Hazeltine	IEEE Trans. Electron. Comput.	1
1963	Regular expressions and variable length encodings (Corresp.) Barrett Hazeltine	IEEE Trans. Inf. Theory	1