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Jakub Kedzierski

dblp:92/1028 · DBLP profile ↗
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2ranked-venue papers
1as first author
1since 2021 · last 2024
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design
0.112010
FDSOI Process Technology for Subthreshold-Operation Ultralow-Power Electronics · Proc. IEEE 2010
Integrated circuit design
low-power circuit design
0.112010
FDSOI Process Technology for Subthreshold-Operation Ultralow-Power Electronics · Proc. IEEE 2010
Integrated circuit design › semiconductor device fabrication
process technology
0.112010
FDSOI Process Technology for Subthreshold-Operation Ultralow-Power Electronics · Proc. IEEE 2010
Integrated circuit design › low-power circuit design
subthreshold circuit design
0.112010
FDSOI Process Technology for Subthreshold-Operation Ultralow-Power Electronics · Proc. IEEE 2010

Methods — techniques the papers use, named apart from their topics

TCAD simulation · 0.1
YearPublicationVenuePosition
2024 Deep Learning Approach to Improve Image Super-Resolution with Aliasing
abstract
Super-resolution is a technique to improve the wide-ranging quality, sharpness of images, video frames, and multidimensional images with low resolution (LR) by increasing resolution. In this paper, we analyze three popular superresolution approaches, namely SRCNN, SRGAN, and autoencoders, trying to improve their performance when aliasing is present in the training data. In each of the deep learning models, internal improvements and changes were made to the structures to improve quality, and the evaluation of the metrics was carried out on three data sets. Among the tested algorithms, the best results were achieved on a deeply rebuilt autoencoder with implemented recursive layers while maintaining a similar number of parameters, as well as on an improved generative adversarial network (SRGAN) belonging to the family of generative ad hoc networks. The analysis of the experimental results allows us to conclude that deep super-resolution models can indeed obtain satisfactory effects when trained with proper anti-alisaing techniques.
Jakub Kedzierski, Andrzej Rusiecki
KES1
2010 FDSOI Process Technology for Subthreshold-Operation Ultralow-Power Electronics
abstract
Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation at 0.3 V may achieve a 97% reduction in switching energy compared to conventional transistors. The process technology described in this article takes advantage of the capacitance and performance benefits of thin-body silicon-on-insulator devices, combined with a workfunction engineered mid-gap metal gate.
Steven A. Vitale, Peter W. Wyatt, Nisha Checka, Jakub Kedzierski, Craig L. Keast
Proc. IEEE4