EDBT 2026 Demo / reviewers in the wild / expert
Devendra Vidhani
dblp:92/1819
· DBLP profile ↗
4ranked-venue papers
0as first author
0since 2021 · last 2016
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2Databases, data management, data science and information retrieval · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Databases, data mining, and information retrieval
1 paper |
Database system architecture and tuning · 50% Query processing and optimization · 50% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 59% Cloud and datacenter computing · 41% |
Topics — the 4 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › physical design
layout compaction |
0.0 | 1 | 2000 | Optimal phase conflict removal for layout of dark field alternatingphase shifting masks · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Electronic design automation › physical design
layout optimization |
0.0 | 1 | 2000 | Optimal phase conflict removal for layout of dark field alternatingphase shifting masks · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Electronic design automation › physical design › lithography
phase shift mask |
0.0 | 1 | 2000 | Optimal phase conflict removal for layout of dark field alternatingphase shifting masks · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Electronic design automation
physical design |
0.0 | 1 | 2000 | Optimal phase conflict removal for layout of dark field alternatingphase shifting masks · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Methods — techniques the papers use, named apart from their topics
query planning · 0.5mapreduce · 0.5graph processing · 0.5t-join · 0.0planar embedding · 0.0graph coloring · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | SQL-SA for big data discovery polymorphic and parallelizable SQL user-defined scalar and aggregate infrastructure in Teradata Aster 6.20abstractThere is increasing demand to integrate big data analytic systems using SQL. Given the vast ecosystem of SQL applications, enabling SQL capabilities allows big data platforms to expose their analytic potential to a wide variety of end users, accelerating discovery processes and providing significant business value. Most existing big data frameworks are based on one particular programming model such as MapReduce or Graph. However, data scientists are often forced to manually create adhoc data pipelines to connect various big data tools and platforms to serve their analytic needs. When the analytic tasks change, these data pipelines may be costly to modify and maintain. In this paper we present SQL-SA, a polymorphic and parallelizable SQL scalar and aggregate infrastructure in Aster 6.20. This infrastructure extends Aster 6's MapReduce and Graph capabilities to support polymorphic user-defined scalar and aggregate functions using flexible SQL syntax. The implementation enhances main Aster components including query syntax, API, planning and execution extensively. Integrating these new user-defined scalar and aggregate functions with Aster MapReduce and Graph functions, Aster 6.20 enables data scientists to integrate diverse programming models in a single SQL statement. The statement is automatically converted to an optimal data pipeline and executed in parallel. Using a real world business problem and data, Aster 6.20 demonstrates a significant performance advantage (25%+) over Hadoop Pig and Hive. Robert M. Wehrmeister, James Shau, Abhirup Chakraborty, Daley Alex, Awny Al Omari, Feven Atnafu, Jeff Davis, Litao Deng, Deepak Jaiswal, Chittaranjan Keswani, Yafeng Lu, Tom Reyes, Kashif Siddiqui, David E. Simmen, Devendra Vidhani, Daniel Yu |
ICDE | 17 |
| 2000 | Optimal phase conflict removal for layout of dark field alternatingphase shifting masksabstractWe describe new, efficient algorithms for layout modification and phase assignment for dark field alternating-type phase shifting masks in the single exposure regime. We make the following contributions. First, we suggest new two-coloring and compaction approach that simultaneously optimizes layout and phase assignment which is based on planar embedding of an associated conflict graph. We also describe additional approaches to cooptimization of layout and phase assignment for alternating PSM. Second, we give optimal and fast algorithms to minimize the number of phase conflicts that must be removed to ensure two colorability of the conflict graph. We reduce this problem to the T-join problem which asks for a minimum weight edge set A such that a node u is incident to an odd number of edges of A if u belongs to a given node subset T of a weighted graph. Third, we suggest several practical algorithms for the T-join problem. In sparse graphs, our algorithms are faster than previously known methods. Computational experience with industrial VLSI layout benchmarks shows the advantages of the new algorithms. Piotr Berman, Andrew B. Kahng, Devendra Vidhani, Alex Zelikovsky |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 1999 | Optimal phase conflict removal for layout of dark field alternating phase shifting masksabstractWe describe new, efficient algorithms for layout modification and phase assignment for dark field alternating-type phase shifting masks in the single exposure regime. We make the following contributions. First, we suggest new two-coloring and compaction approach that simultaneously optimizes layout and phase assignment which is based on planar embedding of an associated conflict graph. We also describe additional approaches to cooptimization of layout and phase assignment for alternating PSM. Second, we give optimal and fast algorithms to minimize the number of phase conflicts that must be removed to ensure two colorability of the conflict graph. We reduce this problem to the -join problem which asks for a minimum weight edge set such that a node is incident to an odd number of edges of if belongs to a given node subset of a weighted graph. Third, we suggest several practical algorithms for the -join problem. In sparse graphs, our algorithms are faster than previously known methods. Computational experience with industrial VLSI layout benchmarks shows the advantages of the new algorithms. Piotr Berman, Andrew B. Kahng, Devendra Vidhani, Alex Zelikovsky |
ISPD | 3 |
| 1999 | The T-join Problem in Sparse Graphs: Applications to Phase Assignment Problem in VLSI Mask Layout
Piotr Berman, Andrew B. Kahng, Devendra Vidhani, Alex Zelikovsky |
WADS | 3 |