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Paul Lieverse

dblp:92/2391 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 2006
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 50% Parallel and multicore computing · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › parallel computation models
process networks
0.012000
YAPI: application modeling for signal processing systems · DAC 2000
Electronic design automation
system-level design
0.012000
YAPI: application modeling for signal processing systems · DAC 2000

Methods — techniques the papers use, named apart from their topics

kahn process networks · 0.0c++ runtime library · 0.0
YearPublicationVenuePosition
2006 System architecture evaluation using modular performance analysis: a case study
Ernesto Wandeler, Lothar Thiele, Marcel Verhoef, Paul Lieverse
Int. J. Softw. Tools Technol. Transf.4
2001 System Level Design with Spade: an M-JPEG Case Study
abstract
Presents and evaluates the SPADE (System level Performance Analysis and Design space Exploration) methodology through an illustrative case study. SPADE is a method and tool for architecture exploration of heterogeneous signal processing systems. In this case study we start from an M-JPEG application and use SPADE to evaluate alternative multiprocessor architectures for implementing this application. SPADE follows the Y-chart paradigm for system level design; application and architecture are modeled separately and mapped onto each other in an explicit design step. SPADE permits architectures to be modeled at an abstract level using a library of generic building blocks, thereby reducing the cost of model construction and simulation. The case study shows that SPADE supports efficient exploration of candidate architectures; models can be easily constructed, modified and simulated in order to quickly evaluate alternative system implementations.
Paul Lieverse, Todor P. Stefanov, Pieter van der Wolf, Ed F. Deprettere
ICCAD1
2000 High Level Modeling for Parallel Executions of Nested Loop Algorithms
abstract
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications (algorithms) and the implementations (architecture), a mapping of the former into the latter and a simulator for fast execution of the whole. Signal processing algorithms are very often nested-loop algorithms with a high degree of inherent parallelism. This paper presents-for such applications-suitable application and implementation models, a method to convert a given imperative executable specification to a specification in terms of the application model, a method to map this specification into an architecture specification in terms of the implementation model, and a method to analyze the performance through simulation. The methods and tools ore illustrated by means of an example.
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, Bart Kienhuis
ASAP3
2000 YAPI: application modeling for signal processing systems
abstract
We present a programming interface called YAPI to model signal processing applications as process networks. The purpose of YAPI is to enable the reuse of signal processing applications and the mapping of signal processing applications onto heterogeneous systems that contain hardware and software components. To this end, YAPI separates the concerns of the application programmer, who determines the functionality of the system, and the system designer, who determines the implementation of the functionality. The proposed model of computation extends the existing model of Kahn process networks with channel selection to support non-deterministic events. We provide an efficient implementation of YAPI in the form of a C++ run-time library to execute the applications on a workstation. Subsequently, the applications are used by the system designer as input for mapping and performance analysis in the design of complex signal processing systems. We evaluate this methodology on the design of a digital video broadcast system-on-chip.
Erwin A. de Kock, W. J. M. Smits, Pieter van der Wolf, Jean-Yves Brunel, Wido Kruijtzer, Paul Lieverse, Kees A. Vissers, Gerben Essink
DAC6