Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page
Demo Data from EDBT 2026 / reviewers in the wild / expert

Asok Bhattacharyya

dblp:92/2722 · DBLP profile ↗
← Back
1ranked-venue papers
1as first author
0since 2021 · last 1983
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test › sequential circuit testing
checking experiments		 0.011983
On a Novel Approach of Fault Detection in an Easily Testable Sequential Machine with Extra Inputs and Extra Outputs · IEEE Trans. Computers 1983
Electronic design automation › hardware verification and test
fault diagnosis		 0.011983
On a Novel Approach of Fault Detection in an Easily Testable Sequential Machine with Extra Inputs and Extra Outputs · IEEE Trans. Computers 1983
Electronic design automation
hardware verification and test		 0.011983
On a Novel Approach of Fault Detection in an Easily Testable Sequential Machine with Extra Inputs and Extra Outputs · IEEE Trans. Computers 1983
Electronic design automation › hardware verification and test › fault diagnosis › system-level diagnosis
sequential diagnosis		 0.011983
On a Novel Approach of Fault Detection in an Easily Testable Sequential Machine with Extra Inputs and Extra Outputs · IEEE Trans. Computers 1983
Electronic design automation › hardware verification and test
test generation		 0.011983
On a Novel Approach of Fault Detection in an Easily Testable Sequential Machine with Extra Inputs and Extra Outputs · IEEE Trans. Computers 1983

Methods — techniques the papers use, named apart from their topics

extra input/output augmentation · 0.0
YearPublicationVenuePosition
1983 On a Novel Approach of Fault Detection in an Easily Testable Sequential Machine with Extra Inputs and Extra Outputs
abstract
By augmenting a given sequential machine M with two extra input symbols Ie1 and Ie2 and with one extra output terminal Z', a method is developed in this paper for designing an efficient checking experiment for the machine M and for its fault diagnosis to cover the types of faults which may result in an increase in the number of states of the original machine M. The method is an extension of the works of Fujiwara et al.[6], and the scheme of modification never alters the modified machine M' from its easily testable nature as defined by Fujiwara et al [16]. The checking sequences exhibit remarkable savings of the number of input symbols for many sequential machines having a large number of states as compared to that of Fujiwara et al [16].
Asok Bhattacharyya
 IEEE Trans. Computers1