Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Shankar Ramaswamy

dblp:92/5015 · DBLP profile ↗
← Back
5ranked-venue papers
4as first author
0since 2021 · last 1997
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 4 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing
multicomputer
0.011997
A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers · IEEE Trans. Parallel Distributed Syst. 1997
Parallel and multicore computing
parallel programming models
0.011997
A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers · IEEE Trans. Parallel Distributed Syst. 1997

Methods — techniques the papers use, named apart from their topics

compiler optimization · 0.0HPF compilation · 0.0
YearPublicationVenuePosition
1997 A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers
abstract
Distributed Memory Multicomputers (DMMs), such as the IBM SP-2, the Intel Paragon, and the Thinking Machines CM-5, offer significant advantages over shared memory multiprocessors in terms of cost and scalability. Unfortunately, the utilization of all the available computational power in these machines involves a tremendous programming effort on the part of users, which creates a need for sophisticated compiler and run-time support for distributed memory machines. In this paper, we explore a new compiler optimization for regular scientific applications-the simultaneous exploitation of task and data parallelism. Our optimization is implemented as part of the PARADIGM HPF compiler framework we have developed. The intuitive idea behind the optimization is the use of task parallelism to control the degree of data parallelism of individual tasks. The reason this provides increased performance is that data parallelism provides diminishing returns as the number of processors used is increased. By controlling the number of processors used for each data parallel task in an application and by concurrently executing these tasks, we make program execution more efficient and, therefore, faster.
Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee
IEEE Trans. Parallel Distributed Syst.1
1996 Optimizations for Efficient Array Redistribution on Distributed Memory Multicomputers
Shankar Ramaswamy, Barbara B. Simons, Prithviraj Banerjee
J. Parallel Distributed Comput.1
1995 Advanced Compilation Techniques in the PARADIGM Compiler for Distributed-memory Multicomputers
abstract
The PARADIGM compiler project provides an automated means to parallelize programs, written in a serial programming model, for efficient execution on distributed-memory multicomputers.A previous implementation of the compiler based on the PTD representation allowed symbolic array sizes, affine loop bounds and array subscripts, and variable number of processors, provided that arrays were singleor multi-dimensionally block distributed.The techniques presented here extend the compiler to also accept multidimensional cyclic and block-c yclic distributions within a uniform symbolic framework.These extensions demand more sophisticated symbolic manipulation capabilities.A novel aspect of our approach is to meet this demand by interfacing PARADIGM with a powerful off-the-shelf symbolic package, MathematicaTM.This paper describes some of the MathematzcaTM routines that performs various transformations, shows how they are invoked and used by the compiler to overcome the new challenges, and presents experimental results for code involving cyclic and block-cyclic arrays as evidence of the feasibility of the approach.1
Ernesto Su, Antonio Lain, Shankar Ramaswamy, Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee
International Conference on Supercomputing3
1994 A Convex Programming Approach for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers
abstract
Compilers have focused on the exploitation of one of functional or data parallelism in the past. The PARADIGM compiler project at the University of Illinois is among the first to incorporate techniques for simultaneous exploitation of both. The work in this paper describes the techniques used in the PARADIGM compiler and analyzes the optimality of these techniques. It is the first of its kind to use realistic cost models and includes data transfer costs which all previous researchers have neglected. Preliminary results on the CM-5 show the efficacy of our methods and the significant advantages of using functional and data parallelism together for execution of real applications.
Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee
ICPP (2)1
1993 Processor Allocation and Scheduling of Macro Dataflow Graphs on Distributed Memory Multicomputers by the PARADIGM Compiler
abstract
Functional or Control parallelism is an efiectiuc way to increase speedups in Multicomputers. Programs for these machines are represented by Macro Dataflow Graphs (MRGsJ for the purpose of functional parallelism analysk and exploitation. Algorithms for allocation and schedttlang of MDGs have been discussed along with some analysis of their optirnality. These algorithms attempt to minimize the execution time of any given MDG through exploitation of functional parallelism. Our preliminary results show their eflectiveness over naive algorithms.
Shankar Ramaswamy, Prithviraj Banerjee
ICPP (2)1