EDBT 2026 Demo / reviewers in the wild / expert
Laura Israel
dblp:92/844
· DBLP profile ↗
2ranked-venue papers
0as first author
1since 2021 · last 2024
0009-0003-5008-1785ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 1 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Rendering · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
GPUs and heterogeneous computing · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Rendering
global illumination |
0.0 | 1 | 1989 | Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories · SIGGRAPH 1989 |
Rendering
parallel rendering |
0.0 | 1 | 1989 | Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories · SIGGRAPH 1989 |
Rendering › global illumination
radiosity |
0.0 | 1 | 1989 | Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories · SIGGRAPH 1989 |
Rendering
real-time rendering |
0.0 | 1 | 1989 | Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories · SIGGRAPH 1989 |
GPUs and heterogeneous computing
graphics accelerator |
0.0 | 1 | 1989 | Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories · SIGGRAPH 1989 |
Rendering
volume rendering |
0.0 | 1 | 1989 | Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories · SIGGRAPH 1989 |
Methods — techniques the papers use, named apart from their topics
ring network interconnection · 0.0quadratic expression evaluation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Story of Your Lazy Function's Life: A Bidirectional Demand Semantics for Mechanized Cost Analysis of Lazy ProgramsabstractLazy evaluation is a powerful tool that enables better compositionality and potentially better performance in functional programming, but it is challenging to analyze its computation cost. Existing works either require manually annotating sharing, or rely on separation logic to reason about heaps of mutable cells. In this paper, we propose a bidirectional demand semantics that allows for extrinsic reasoning about the computation cost of lazy programs without relying on special program logics. To show the effectiveness of our approach, we apply the demand semantics to a variety of case studies including insertion sort, selection sort, Okasaki’s banker’s queue, and the implicit queue. We formally prove that the banker’s queue and the implicit queue are both amortized and persistent using the Rocq Prover (formerly known as Coq). We also propose the reverse physicist’s method, a novel variant of the classical physicist’s method, which enables mechanized, modular and compositional reasoning about amortization and persistence with the demand semantics. Li-yao Xia, Laura Israel, Maite Kramarz, Nicholas Coltharp, Koen Claessen, Stephanie Weirich, Yao Li 0004 |
Proc. ACM Program. Lang. | 2 |
| 1989 | Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memoriesabstractThis paper introduces the architecture and initial algorithms for Pixel-Planes 5, a heterogeneous multi-computer designed both for high-speed polygon and sphere rendering (1M Phong-shaded triangles/second) and for supporting algorithm and application research in interactive 3D graphics. Techniques are described for volume rendering at multiple frames per second, font generation directly from conic spline descriptions, and rapid calculation of radiosity form-factors. The hardware consists of up to 32 math-oriented processors, up to 16 rendering units, and a conventional 1280 × 1024-pixel frame buffer, interconnected by a 5 gigabit ring network. Each rendering unit consists of a 128 × 128-pixel array of processors-with-memory with parallel quadratic expression evaluation for every pixel. Implemented on 1.6 micron CMOS chips designed to run at 40MHz, this array has 208 bits/pixel on-chip and is connected to a video RAM memory system that provides 4,096 bits of off-chip memory. Rendering units can be independently reasigned to any part of the screen or to non-screen-oriented computation. As of April 1989, both hardware and software are still under construction, with initial system operation scheduled for fall 1989. Henry Fuchs, John Poulton, John G. Eyles, Trey Greer, Jack Goldfeather, David A. Ellsworth, Steven E. Molnar, Greg Turk, Brice Tebbs, Laura Israel |
SIGGRAPH | 10 |