Prateek Bhansali

dblp:93/4861 · DBLP profile ↗
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4ranked-venue papers
2as first author
1since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 2 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 50% Electronic design automation · 50%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits
analog circuit design
0.922021
DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks · DAC 2021
MLParest: Machine Learning based Parasitic Estimation for Custom Circuit Design · DAC 2020
Electronic design automation › circuit sizing
analog circuit sizing
0.512021
DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks · DAC 2021
Electronic design automation › physical design
parasitic extraction
0.412020
MLParest: Machine Learning based Parasitic Estimation for Custom Circuit Design · DAC 2020

Methods — techniques the papers use, named apart from their topics

reinforcement learning · 0.5deep neural network · 0.5actor-critic algorithms · 0.5model training framework · 0.4machine learning · 0.4
YearPublicationVenuePosition
2021 DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks
abstract
Analog circuit sizing takes a significant amount of manual effort in a typical design cycle. With rapidly developing technology and tight schedules, bringing automated solutions for sizing has attracted great attention. This paper presents DNN-Opt, a Reinforcement Learning (RL) inspired Deep Neural Network (DNN) based black-box optimization framework for analog circuit sizing. The key contributions of this paper are a novel sample-efficient two-stage deep learning optimization framework leveraging RL actor-critic algorithms, and a recipe to extend it on large industrial circuits using critical device identification. Our method shows 5—30x sample efficiency compared to other black-box optimization methods both on small building blocks and on large industrial circuits with better performance metrics. To the best of our knowledge, this is the first application of DNN-based circuit sizing on industrial scale circuits.
Ahmet Faruk Budak, Prateek Bhansali, Bo Liu 0003, Nan Sun 0001, David Z. Pan, Chandramouli V. Kashyap
DAC2
2020 MLParest: Machine Learning based Parasitic Estimation for Custom Circuit Design
abstract
A novel machine learning based parasitic estimation (MLParest) method for pre-layout custom circuit design is presented. It reduces the error between pre-layout and post-layout circuit simulation from 37% to 8% on average for different measurements across a variety of analog circuits. MLParest can thus greatly reduce the number of iterations between pre-layout and post-layout design phases. The key contributions of this work are a machine learning based approach to parasitic estimation and a push-button model training framework, scalable across different technology nodes. To the best of our knowledge, a machine learning based framework of parasitic estimation is an industry first.
Brett Shook, Prateek Bhansali, Chandramouli V. Kashyap, Chirayu Amin, Siddhartha Joshi
DAC2
2009 Gen-Adler: the Generalized Adler's equation for injection locking analysis in oscillators
abstract
Injection locking analysis based on classical Adler's equation is limited to LC oscillators as it is dependent on quality factor. In this paper, we present the generalized Adler's equation applicable for injection locking analysis on oscillators independent of the circuit topology. The equation is obtained by averaging the PPV phase macromodel. The procedure is considerably simple and handy to determine the locking range for arbitrary shape small AC injection signal. Analytical equations for injection locking dynamics are formulated using the generalized Adler's equation and validated with the PPV simulations.
Prateek Bhansali, Jaijeet S. Roychowdhury
ASP-DAC1
2008 Comprehensive procedure for fast and accurate coupled oscillator network simulation
abstract
Coupled oscillator networks occur in various domains such as biology, astrophysics and electronics. In this paper, we present a comprehensive procedure for rapid and accurate simulation of large coupled oscillator networks using widely accepted, fully-nonlinear perturbation projection vector (PPV) phase macromodels. We validate our method against full simulation of 20times20 coupled network of Brusselator biochemical oscillator and obtain computational speedups of 170x over full simulation. Furthermore, we apply the method to study self-organization phenomenon of Brusselator under asymmetric coupling and time period variations.
Prateek Bhansali, Shweta Srivastava, Xiaolue Lai, Jaijeet S. Roychowdhury
ICCAD1