The on-off statistics of conversational speech have been investigated using a large database of 50 min of telephone speech. Based on the measurement results of on-off patterns, probability density functions of silence and talkspurt durations are modeled approximately by two weighted geometric functions. Then, for any value of hangover or fill-in, speech parameters such as speech activity, average silence, and talkspurt durations are calculated using the fitted probability density function of silence durations and compared to those measured. Directly measured values of speech parameters and those calculated agree closely for a practical range of hangover and fill-in time. For a large hangover time greater than 200 ms, silences and talkspurts can be fit by an exponential distribution and a constant-plus-exponential distribution, respectively. On the other hand, for a large fill-in time greater than 200 ms, silences and talkspurts can be modeled by a constant-plus-exponential distribution and an exponential distribution, respectively. With both large hangover and fill-in values, the talkspurt model agrees closely with the measured data, but the silence model does not agree as closely as the talkspurt model.

In this paper, implementation of a compact and efficient multirate speech digitizer with variable transmission rates of 2.4, 4.8, 9.6, and 14.96 kbits/s is presented. The multirate algorithm has been made based on the residual-excited linear prediction (RELP) vocoder with a transmission rate of 9.6 kbits/s. The residual encoder employed in the RELP vocoder uses hybrid companding delta modulation (HCDM). This HCDM is also used as a 14.96 kbit/s coder. If the residual in the RELP system is down-sampled before encoding, a 4.8 kbit/s coder can be realized. If the residual encoder is not used, a 2.4 kbit/s linear predictive coder (LPC) can be realized by incorporating a pitch extractor. In the 4.8 and 9.6 kbit/s coders the pitch-implanted residual excitation method has been used to generate the excitation signal to the synthesis filter. The multirate speech digitizer algorithm has been implemented using 2900 series bit-slice microprocessors. The external memory is composed of 2K RAM's and 2K ROM's. The system design is a two-bus structure with a 204 ns cycle time. With efficient hardware and software design, the multirate speech digitizer requires almost the same hardware complexity as compared with the conventional 2.4 kblt/s LPC vocoder.

In this paper we describe hardware implementation of a 2400 bit/s two-channel linear predictive vocoder. The vocoder hardware uses the latest 2900 series "bit slice" microprocessor chips, and 2K RAM's and 1K ROM's of data memory. The system design is a two bus structure with a 208 ns cycle time. A significant feature of the vocoder is that it is capable of processing two voice channels simultaneously. Throughout the paper, emphasis is placed on details of firmware development of the vocoder system. Efficient design of the vocoder hardware is also discussed.