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Tom Blank

dblp:93/5550 · DBLP profile ↗
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10ranked-venue papers
2as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 7 · 2 first-authorSoftware engineering, systems software and programming languages · 1Human-computer interaction and ubiquitous computing · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Human-computer interaction and pervasive computing
1 paper
Collaborative and social computing · 100%
Computer architecture, parallel and distributed computing, and storage systems
7 papers
Electronic design automation · 77% High-performance computing · 10% Performance modeling and evaluation · 8%

Topics — the 18 heaviest of 19, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Collaborative and social computing
remote collaboration
0.112012
IllumiShare: sharing any surface · CHI 2012
Collaborative and social computing › groupware
shared workspace
0.012012
IllumiShare: sharing any surface · CHI 2012
Electronic design automation
hardware verification and test
0.031988
Fast functional simulation: an incremental approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Parallel Logic Simulation on General Purpose Machines · DAC 1988
Behavioral Modeling for System Design (panel) · DAC 1988
Electronic design automation › circuit simulation
incremental simulation
0.021988
Fast functional simulation: an incremental approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Incremental-in-time Algorithm for Digital Simulation · DAC 1988
Electronic design automation › hardware verification and test
logic simulation
0.021988
Fast functional simulation: an incremental approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Parallel Logic Simulation on General Purpose Machines · DAC 1988
Electronic design automation › design representation
behavioral modeling
0.011988
Behavioral Modeling for System Design (panel) · DAC 1988
Electronic design automation › hardware simulation
digital simulation
0.011988
Incremental-in-time Algorithm for Digital Simulation · DAC 1988
Electronic design automation › hardware simulation
functional simulation
0.011988
Fast functional simulation: an incremental approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › hardware verification and test
hardware verification
0.011988
Incremental-in-time Algorithm for Digital Simulation · DAC 1988
Performance modeling and evaluation › simulation › architectural simulation
simulation acceleration
0.011988
Fast functional simulation: an incremental approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
High-performance computing › sparse linear algebra
sparse linear systems
0.011987
A Parallel Solution Method for Large Sparse Systems of Equations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
High-performance computing › sparse linear algebra
sparse matrix factorization
0.011987
A Parallel Solution Method for Large Sparse Systems of Equations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Electronic design automation
physical design
0.011986
A Best-First Search Algorithm for Optimal PLA Folding · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
Electronic design automation › logic synthesis › logic optimization
PLA folding
0.011986
A Best-First Search Algorithm for Optimal PLA Folding · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
Electronic design automation › design automation tools
parallel electronic design automation
0.011981
A parallel bit map processor architecture for DA algorithms · DAC 1981
Performance modeling and evaluation › simulation › discrete-event simulation
parallel discrete event simulation
0.011988
Parallel Logic Simulation on General Purpose Machines · DAC 1988
Distributed systems
distributed algorithms
0.011987
A Parallel Solution Method for Large Sparse Systems of Equations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Parallel and multicore computing › parallel programming models
message passing
0.011987
A Parallel Solution Method for Large Sparse Systems of Equations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987

Methods — techniques the papers use, named apart from their topics

user study · 0.1prototype development · 0.1incremental-in-time algorithm · 0.0incremental evaluation · 0.0design change propagation · 0.0nested dissection ordering · 0.0multifrontal distribution · 0.0graph theory · 0.0best-first search · 0.0
YearPublicationVenuePosition
2012 IllumiShare: sharing any surface
abstract
Task and reference spaces are important communication channels for remote collaboration. However, all existing systems for sharing these spaces have an inherent weakness: they cannot share arbitrary physical and digital objects on arbitrary surfaces. We present IllumiShare, a new cost-effective, light-weight device that solves this issue. It both shares physical and digital objects on arbitrary surfaces and provides rich referential awareness. To evaluate IllumiShare, we studied pairs of children playing remotely. They used IllumiShare to share the task-reference space and Skype Video to share the person space. The study results show that IllumiShare shared the play space in a natural and seamless way. We also found that children preferred having both spaces compared to having only one. Moreover, we found that removing the task-reference space caused stronger negative disruptions to the play task and engagement level than removing the person space. Similarly, we found that adding the task-reference space resulted in stronger positive disruptions.
Sasa Junuzovic, Kori Inkpen, Tom Blank, Anoop Gupta
CHI3
2011 A Non-invasive Wearable Neck-Cuff System for Real-Time Sleep Monitoring
abstract
Sleep is an important part of our lives which affects many life factors such as memory, learning, metabolism and the immune system. Researchers have found correlations between sleep and several diseases such as Chronic Obstructive Pulmonary disease, Chronic Heart Failure, Alzheimer's disease, etc. However, sleep data is mainly recorded and diagnosed in sleep labs or in hospitals for some critical cases with high costs. In this work we develop a non-invasive, wearable neck-cuff system capable of real-time monitoring and visualization of physiological signals. These signals are generated from various sensors housed in a soft neck-worn collar and sent via Bluetooth to a cell phone which stores the data. This data is processed and reported to the user or uploaded to the cloud and/or to a local PC. With this system we are able to monitor people's sleep continuously in a non-invasive and low cost method while at the same time collect a large database for sleep data which may benefit future advances in new findings and possibly enable a diagnosis of other diseases. We show as one of the applications of our system the possible detection of obstructive sleep apnea which is a common sleep disorder.
Mahsan Rofouei, Mike Sinclair, Ray Bittner, Tom Blank, Nick Saw, Gerald DeJean, Jeff Heffron
BSN4
1990 The Hermod behavioral synthesis system
abstract
Hermod is an interactive behavioral synthesis program developed at Stanford University. With the use of a combined control and data flow graph (C /DFG) as an intermediate representation, Hermod generates functional blocks and their interconnection from behavioral descriptions. Hermod supports a menu-driven interface, displaying the control and data flow graph with a set of legitimate timing-cuts and its hardware representation. Emphasizing user participation, the system allows the user to control state partitioning and resource sharing through a graphical interface to explore the maximal design space. Written in an object-oriented language C ++, Hermod generates a hardware representation in several minutes from a behavioral description of practical size on a VAXstation II /GPX.
Masayasu Odani, Sun Young Hwang, Tom Blank, Tomas Rokicki
J. Syst. Softw.3
1988 Behavioral Modeling for System Design (panel)
Tom Blank
DAC1
1988 Incremental-in-time Algorithm for Digital Simulation
Kiyoung Choi, Sun Young Hwang, Tom Blank
DAC3
1988 Parallel Logic Simulation on General Purpose Machines
Larry Soulé, Tom Blank
DAC2
1988 Fast functional simulation: an incremental approach
abstract
In an effort to speed up simulation, a novel algorithm,, called incremental simulation evaluates the circuit components that can be affected directly or indirectly by design changes, utilizing the information generated during the previous simulation to reduce the number of component evaluations to a minimum. The authors describe the design and implementation of the incremental algorithm for logic or functional simulation, which substantially improves the run-time performance over existing simulators by using the incremental property of the hardware design process.>
Sun Young Hwang, Tom Blank, Kiyoung Choi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1987 A Parallel Solution Method for Large Sparse Systems of Equations
abstract
This paper presents a new distributed multifrontal sparse matrix decomposition algorithm suitable for message passing parallel processors. The algorithm uses a nested dissection ordering and a multifrontal distribution of the matrix to minimize interprocessor data dependencies and overcome the communication bottleneck previously reported for sparse matrix decomposition [1]. Distributed multifrontal forward elimination and back substitution algorithms are also provided. Results of an implementation on the Intel iPSC are presented. Up to 16 processors are used to solve systems with as many as 7225 equations. With 16 processors, speedups of 10.2 are observed and the decomposition is shown to achieve 67 percent processor utilization. This work was motivated by the need to reduce the computational bottleneck in the Stanford PISCES [2] device simulator; however, it should be applicable to a wide range of scientific and engineering problems
Robert F. Lucas, Tom Blank, Jerome J. Tiemann
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1986 A Best-First Search Algorithm for Optimal PLA Folding
abstract
In this paper we propose a new algorithm for optimal PLA folding based on a graph theoretic formulation. An efficient best-first search (BFS) algorithm is presented which finds a near-optimal PLA folding. The proposed algorithm first constructs the longest paths on the associated disjoint graph generated from the PLA personality matrix, and then extracts the ordered folding sets from the constructed paths. The algorithm is shown to be effective for most test cases.
Sun Young Hwang, Robert W. Dutton, Tom Blank
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
1981 A parallel bit map processor architecture for DA algorithms
Tom Blank, Mark Stefik, William M. van Cleemput
DAC1