Demo Data from EDBT 2026 / reviewers in the wild / expert
Toshiyuki Kato
dblp:93/6215
· DBLP profile ↗
4ranked-venue papers
2as first author
0since 2021 · last 2017
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 2 · 2 first-authorSystems, architecture and hardware · 1Graphics, computer vision, multimedia, augmented reality and games · 1Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Virtual and augmented reality · 75% Computational photography and imaging · 25% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Virtual and augmented reality › tracking
3d object tracking |
0.3 | 1 | 2017 | Extended Dot Cluster Marker for High-speed 3D Tracking in Dynamic Projection Mapping · ISMAR 2017 |
Virtual and augmented reality
augmented reality |
0.3 | 1 | 2017 | Extended Dot Cluster Marker for High-speed 3D Tracking in Dynamic Projection Mapping · ISMAR 2017 |
Virtual and augmented reality › tracking
marker-based tracking |
0.3 | 1 | 2017 | Extended Dot Cluster Marker for High-speed 3D Tracking in Dynamic Projection Mapping · ISMAR 2017 |
Computational photography and imaging
projection mapping |
0.3 | 1 | 2017 | Extended Dot Cluster Marker for High-speed 3D Tracking in Dynamic Projection Mapping · ISMAR 2017 |
Methods — techniques the papers use, named apart from their topics
monocular tracking · 0.3dot cluster marker · 0.3deformable marker design · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2017 | Extended Dot Cluster Marker for High-speed 3D Tracking in Dynamic Projection MappingabstractThe technique of Projection Mapping, which is useful for merging real-world geometry with an augmented appearance, is a promising core technology for augmented reality (AR). In recent years, dynamically changing environments, mainly a consequence of the growing demand for interactive user experiences, have contributed to a new style of AR applications. However, performance levels of current systems for realizing 3D effects, in terms of the tracking speed and projection ability, are insufficient to meet these demands. In this paper, we present a high-speed, occlusion-robust marker-based 3D tracking method achieved by only using a monocular monochrome image. The objective of our research is to develop an automatic marker design method for any 3D shape and an effective framework for stabilizing tracking at high throughput by extending the latest promising work based on a deformable dot cluster marker [46]. Furthermore, this tracking method was used in combination with a high-speed projector, both of which can achieve high throughput and low latency, on the order of milliseconds. This enabled us to realize a high-quality computational display capable of representing the material appearance of a dynamically moving target. The demonstration showed that the effect of a dynamically changing appearance with nearly imperceptible latency drastically enriches the sense of immersion in the recognition of augmented materials with the naked eye. Yoshihiro Watanabe, Toshiyuki Kato, Masatoshi Ishikawa |
ISMAR | 2 |
| 2017 | Double sparsity for multi-frame super resolution
Toshiyuki Kato, Hideitsu Hino, Noboru Murata |
Neurocomputing | 1 |
| 2015 | Multi-frame image super resolution based on sparse coding
Toshiyuki Kato, Hideitsu Hino, Noboru Murata |
Neural Networks | 1 |
| 2006 | Configurable multi-processor architecture and its processor element designabstractWe developed an application specific multi-processor generation system intended for realtime applications. In this system, we adopted a distributed memory type multi-processor architecture with hierarchical tree network as a configurable multiprocessor which can be adapted to various scale systems flexibly. We have also developed a configurable multi-processor prototype as LSI chips with the 0.18 /spl mu/m CMOS standard cell technology. Tsutomu Nishimura, Takuji Miki, Hiroaki Sugiura 0003, Yuki Matsumoto, Masatsugu Kobayashi, Toshiyuki Kato, Tsutomu Eda, Hironori Yamauchi |
ASP-DAC | 6 |