Yu-Chia Liu

dblp:94/5288 · DBLP profile ↗
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8ranked-venue papers
2as first author
4since 2021 · last 2024
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 2 first-author · 3 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
YearPublicationVenuePosition
2024 Accel-Bench: Exploring the Potential of Programming Using Hardware-Accelerated Functions
abstract
This paper presents Accel-Bench, a benchmark suite that aims to capture the performance of accelerator-intensive programming. To the best of our knowledge, Accel-Bench is the first benchmark suite that utilizes applications that can invoke different domain kernels in their algorithm and quantifies the potential performance gain of using hardware-accelerated functions to compose programs agnostic to their domain.
Abenezer Wudenhe, Yu-Chia Liu, Cris Chen, Hung-Wei Tseng 0001
ISPASS2
2023 Rethinking Programming Frameworks for In-Storage Processing
abstract
In-storage processing (ISP) is the most commercialized implementation of the near-data processing (NDP) model that executes tasks near their storage locations. However, programming ISP devices is complicated as it requires programmers to work closely with the underlying hardware, and even highly-optimized code can easily lead to suboptimal performance.This paper introduces ActivePy. ActivePy makes the programmer completely agnostic to ISP hardware. ActivePy automatically, transpartently, and dynamically generates high-performance code to balance system-wide trade-offs and max-imize the benefits of ISP. Our real system implementation shows that ActivePy can use ISP as efficiently as conventional C-based frameworks.
Yu-Chia Liu, Kuan-Chieh Hsu, Hung-Wei Tseng 0001
DAC1
2021 NDS: N-Dimensional Storage
abstract
Demands for efficient computing among applications that use high-dimensional datasets have led to multi-dimensional computers—computers that leverage heterogeneous processors/accelerators offering various processing models to support multi-dimensional compute kernels. Yet the front-end for these processors/accelerators is inefficient, as memory/storage systems often expose only entrenched linear-space abstractions to an application, and they often ignore the benefits of modern memory/storage systems, such as support for multi-dimensionality through different types of parallel access.
Yu-Chia Liu, Hung-Wei Tseng 0001
MICRO1
2021 OpenUVR: an Open-Source System Framework for Untethered Virtual Reality Applications
abstract
Advancements in heterogeneous computing technologies enable the significant potential of virtual reality (VR) applications. To offer the best user experience (UX), a system should adopt an untethered, wireless-network-based architecture to transfer VR content between the user and the content generator. However, modern wireless network technologies make implementing such an architecture challenging, as VR applications require superior video quality-with high resolution, high frame rates, and very low latency. This paper presents OpenUVR, an open-source framework that uses commodity hardware components to satisfy the demands of interactive, real-time VR applications. OpenUVR significantly improves UX through a redesign of the system stack and addresses the most time-sensitive issues associated with redundant memory copying in modern computing systems. OpenUVR presents a cross-layered VR datapath to avoid redundant data operations and computation among system components, OpenUVR customizes the network stack to eliminate unnecessary memory operations incurred by mismatching data formats in each layer, and OpenUVR uses feedback from mobile devices to remove memory buffers. Together, these modifications allow OpenUVR to reduce VR application delays to 14.32 ms, meeting the 20 ms minimum latency in avoiding motion sickness. As an open-source system that is fully compatible with commodity hardware, OpenUVR offers the research community an opportunity to develop, investigate, and optimize applications for untethered, high-performance VR architectures.
Alec Rohloff, Zackary Allen, Kung-Min Lin, Joshua Okrend, Chengyi Nie, Yu-Chia Liu, Hung-Wei Tseng 0001
RTAS6
2012 A 1.57mW 99dBΩ CMOS transimpedance amplifier for VHF micromechanical reference oscillators
abstract
This work investigates a low-power transimpedance amplifier (TIA) topology suited for VHF micromechanical oscillator applications. The TIA circuit comprises of a regulated-cascode (RGC) transimpedance gain stage and an inverter-based wideband Cherry-Hooper amplifier with capacitive peaking. The circuit was designed using TSMC 0.18μm CMOS technology, exhibiting mid-band gain of 99dBμ and 3dB bandwidth of 280MHz while dissipating only 1.57mW from a 1.5V supply. A linear RLC equivalent model extracted from a practical 48MHz Lamé-mode resonator with Q>;40,000 was interfaced with the TIA circuit in a series-resonant oscillator configuration, showing simulated phase-noise less than -128dBc/Hz at 1kHz offset.
Ming-Huang Li, Cheng-Syun Li, Li-Jen Hou, Yu-Chia Liu, Sheng-Shian Li
ISCAS4
2010 A 55nm 1GHz one-cycle-locking de-skewing circuit
abstract
This paper presents the design of a 55nm 1.0V 1GHz open-loop de-skewing circuit for clock synchronization in a SoC. All-digital architecture and circuit design techniques are adopted and developed to achieve small jitter, low power, super fast locking, and input duty-cycle independence. Even running at 1 GHz, the proposed circuit wakes up from sleep with only one-cycle locking time. Measurement results show a peak-to-peak jitter of 4 ps and a static phase error of 5.46 ps at 1 GHz. To the best of our knowledge, this is the first GHz open-loop de-skewing circuit achieving sub-μW/MHz active power. By power gating, 84% of leakage power is saved in the sleep mode.
Jinn-Shyan Wang, Chun-Yuan Cheng, Je-Ching Liu, Yu-Chia Liu
ISCAS4
2006 An improved SAR controller for DLL applications
abstract
The conventional SAR controller for DLL applications is shown in this paper to have the problem of dead lock. With this problem, the DLLs adopting the SAR controller are useless because they will go unlocked forever in face of supply voltage and temperature variations. An improved SAR controller is proposed to overcome this problem and then to rescue the DLLs
Jinn-Shyan Wang, Chun-Yuan Cheng, Yu-Chia Liu
ISCAS4
2006 Hacking Tricks Toward Security on Network Environments
abstract
Mounting popularity of the Internet has led to the birth of instant messaging, an up-and-coming form of Internet communication. Instant messaging is very popular with businesses and individuals since it has instant communication ability. As a result, Internet security has become a pressing and important topic for discussion. Therefore, in recent years, a lot of attention has been drawn towards Internet security and the various attacks carried out by hackers over the Internet. People today often handle affairs via the Internet. For instance, instead of the conventional letter, they communicate with others by e-mails; they chat with friends through an instant messenger; find information by browsing Websites instead of going to the library; perform e-commerce transactions through the Internet, etc. Although the convenience of the Internet makes our life easier, it is also a threat to Internet security. For instance, a business email intercepted during its transmission may let slip business confidentiality; file transfers via instant messengers may also be intercepted, and then implanted with backdoor malwares; conversations via instant messengers could be eavesdropped. Furthermore, ID and password theft may lose us money when using Internet bank service. Attackers on the Internet use hacking tricks to damage systems while users are connected to the Internet. These threats along with possible careless disclosure of business information make instant messaging a very unsafe method of communication for businesses. The paper divides hacking tricks into three categories: (1) Trojan programs that share files via instant messenger; (2) phishing or fraud via e-mails; and (3) fake Websites
Tzer-Shyong Chen, Fuh-Gwo Jeng, Yu-Chia Liu
PDCAT3