Solar power generation has attracted significant attention recently as a safe and environmentally friendly renewable energy source. However, generally speaking, since the service lives of solar power systems are relatively long, and since it is difficult to detect anomalies in individual solar panels, such plants tend to operate without much consideration for individual panel anomalies. In order to more comprehensively monitor solar power generation systems, the National Institute of Advanced Industrial Science and Technology (AIST) of Japan has developed a direct current (DC) power line communication system that enables monitoring of each panel in a system. Monitored data are then integrated and uploaded to the cloud. Using this monitored data, we found that the integrated power ratio trends of single panel power output are in accordance with a normal distribution. Therefore, herein, we propose an anomaly detection method that uses a normal distribution. We then describe an experiment using 24 solar panels into which pseudo-faults were induced and show that our proposal makes it possible to detect errors with high accuracy.

To solve the problem of fluctuations in clock timing with digital LSIs (also known as the "clock skew" problem), we propose a genetic algorithm (GA) based clock adjustment method that ensures robust clock-timing to cope with fluctuations in the LSI environment such as temperature or power supply voltage. This method is realized by the combination of dedicated adjustable circuitry and adjustment GA software, with the values for multiple adjustable delay circuits inserted into the clock lines being determined by the GA software after fabrication. Experimental results demonstrate that the proposed method can enhance the operational yields of developed test chips while ensuring sufficient timing margins.

This paper presents the first successful application of multi-objective genetic algorithms (MOGA) to transmission line modeling. Conventionally, it is difficult to simultaneously realize high-accuracy transmission line simulations for both the frequency and time-domains. In order to overcome the problem, this paper proposes the application of MOGA to transmission line modeling. The proposed modeling method has two distinctive features: (1) Simultaneous modeling of both frequency and time-domain characteristics. (2) Selection of conventionalmodel from among set of Pareto optimization solutions based on simulation objectives. The results of an experiment with a micro-strip line demonstrate that the proposed method accomplished a transmission line simulation up to 2.54 times more accurate than conventional methods.

In contrast to conventional hardware where the structure is irreversibly fixed in the design process, evolvable hardware (EHW) is designed to adapt to changes in task requirements or changes in the environment, through its ability to reconfigure its own hardware structure dynamically and autonomously. This capacity for adaptation, achieved by employing efficient search algorithms based on the metaphor of evolution, has great potential for the development of innovative industrial applications. This paper introduces EHW chips and six applications currently being developed as part of MITI's Real-World Computing Project; an analog EHW chip for cellular phones, a clock-timing architecture for Giga hertz systems, a neural network EHW chip capable of autonomous reconfiguration, a data compression EHW chip for electrophotographic printers, and a gate-level EHW chip for use in prosthetic hands and robot navigation.

The Internet is rapidly changing from a set of wires and switches that carry packets into a sophisticated infrastructure that delivers a set of complex value-added services to end users. Services can range from bit transport all the way up to distributed value-added services like video teleconferencing, data mining, and distributed interactive simulations. Before such services can be supported in a general and dynamic manner we have to develop appropriate resource management mechanisms. These resource management mechanisms must make it possible to identify and allocate resources that meet service or application requirements, support both isolation and controlled dynamic sharing of resources across organizations sharing physical resources, and be customizable so services and applications can tailor resource usage to optimize their performance. The Darwin project is developing a set of customizable resource management mechanisms that support value-added services, In this paper we present these mechanisms, describe their implementation in a prototype system, and describe the results of a series of proof-of-concept experiments.

The design and performance of a priority forwarding router chip are presented. The chip has four input and four output ports, employs clock-synchronized packet switching, and facilitates 32-bit priority arbitration by means of a priority forwarding scheme that prevents priority inversion and enables accurate priority control within a network. Packets are of a fixed size, each having three 38-bit segments. Each input port has an 8-packet priority queue that enables virtual cut-through switching and pipelined-simultaneous output to at most three different output ports. The chip has two 25-ns pipeline stages and its data transmission rate is 190 MByte/s per port. Clock level simulation shows that the chip can attain high throughput, 9 GByte/s and 34 GByte/s at 64-node and 256-node omega networks with random communication, and excellent real-time performance. Very small laxities are required for in-time delivery of all input packets where the packets exhibit a degree of deadline distribution.>