Multiple-Input-Multiple-Output (MIMO) signal detection is central to nearly every state-of-the-art communication system, and enhancements in error performance and computational complexity of MIMO detection would significantly enhance data rate and latency experienced by the users. Theoretically, the optimal MIMO detector is the maximum-likelihood (ML) MIMO detector; however, due to its extremely high complexity, it is not feasible for large real-world communication systems. Over the past few years, algorithms based on physics-inspired Ising solvers, like Coherent Ising machines and Quantum Annealers, have shown significant performance improvements for the MIMO detection problem. However, the current state-of-the-art is limited to low-order modulations or systems with few users. In this paper, we propose an adaptive multi-stage Ising machine-based MIMO detector that extends the performance gains of physics-inspired computation to Large and Massive MIMO systems with a large number of users and very high modulation schemes (up to 256-QAM). We enhance our previously proposed delta Ising formulation and develop a heuristic that adaptively optimizes the performance and complexity of our proposed method. We perform extensive micro-benchmarking to optimize several free parameters of the system and evaluate our methods’ BER and spectral efficiency for Large and Massive MIMO systems (up to 32 users and 256-QAM modulation).

Optimal MIMO detection is one of the most computationally challenging tasks in wireless systems. We show that the quantum-inspired computing approach based on Coherent Ising Machines (CIMs) is a promising candidate for performing near-optimal MIMO detection. We propose a novel regularized Ising formulation for MIMO detection that mitigates a common error floor issue in the direct approach adopted in the existing literature on MIMO detection using Quantum Annealing. We evaluate our methods using a simplified, quantum-inspired model and show that our methods can achieve a near-optimal performance for several Large MIMO systems, like$16\times 16,20\times 20$, and$24\times 24$MIMO with BPSK modulation.

Optimal MIMO detection is one of the most computationally challenging tasks in wireless systems. We show that new analog computing approaches, such as Coherent Ising Machines (CIMs), are promising candidates for performing near-optimal MIMO detection. We propose a novel regularized Ising formulation for MIMO detection that mitigates a common error floor issue in the naive approach and evolve it into a regularized, Ising-based tree search algorithm that achieves near-optimal performance. By means of numerical simulation using the Rayleigh fading channel model, we show that in principle, a MIMO detector based on a high-speed Ising machine (such as a CIM implementation optimized for latency) would allow a higher transmitter antennas (users)-to-receiver antennas ratio and thus increase the overall throughput of the cell by a factor of two or more for massive MIMO systems. Our methods create an opportunity to operate wireless systems using more aggressive modulation and coding schemes and hence achieve high spectral efficiency: for a$16\times 16$MIMO system, we estimate around$2.5\times $more throughput in the mid-SNR regime (≈12 dB) and$2\times $more throughput in the high-SNR regime (>20 dB) as compared to the industry standard, a Minimum-Mean Square Error (MMSE) linear decoder.

New Frontiers in Optical Technology The proliferation of optical sensors and user interfaces offers opportunities for deeper integration of sensing, processing, and data transmission.

Deep Belief Nets (DBNs) are an emerging application in the machine learning domain, which use Restricted Boltzmann Machines (RBMs) as their basic building block. Although small scale DBNs have shown great potential, the computational cost of RBM training has been a major challenge in scaling to large networks. In this paper we present a highly scalable architecture for Deep Belief Net processing on hardware systems that can handle hundreds of boards, if not more, of customized logic with near linear performance increase. We elucidate tradeoffs between flexibility in the neuron connections, and the hardware resources, such as memory and communication bandwidth, required to build a custom processor design that has optimal efficiency. We illustrate how our architecture can easily support sparse networks with dense regions of connections between neighboring sets of neurons, which is relevant to applications where there are obvious spatial correlations in the data, such as in image processing. We demonstrate the feasibility of our approach by implementing a multi-FPGA system. We show that a speedup of 46X-112X over an optimized single core CPU implementation can be achieved for a four-FPGA implementation.

Recent advances in ultra-high-throughput sequencing technology are allowing researchers to generate immense amounts of raw data in the form of short reads from ultra high-throughput platforms. We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address computing challenges associated with next-generation genome sequencing. A common prerequisite to utilizing data generated by next-generation sequencers is alignment to a reference genome. While dynamic programming (DP) alignment algorithms are generally avoided on conventional architectures due to their computational complexity, they can be tailored for efficient implementation on systolic architectures. We implemented application-specific DP algorithms for aligning data from ultra high throughput sequencers utilizing a reconfigurable computing cluster of BEE2 boards. In our design each FPGA is capable of rapidly aligning multiple sequences in parallel against a long reference genome using multiple systolic arrays. The reconfigurable cluster proves to be scalable and capable of processing real world datasets as large as the Human genome in time proportional to data acquisition. We examine the advantages and practicality of this approach by benchmarking using Illumina sequence data from a large high-throughput sequencing project. We addressed an open question of whether a DP algorithm efficiently implementable on an FPGA can offer a quantitative improvement over the heuristic methods currently employed. Our extensive validation showed that application specific algorithms and computing hardware can provide more accurate results than current heuristic methods and may be particularly useful in circumstances where error rates or evolutionary divergence is high. While directly addressing the important problem of assembling genomes, the methods presented are also relevant to many other "omics" research applications.

We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-throughput sequencing technologies. Advances in sequencing technology allow researchers to generate immense amounts of raw data in the form of short reads with high error rates. A prerequisite to effectively utilizing this data for most applications is accurate alignment to a reference genome. While dynamic programming (DP) alignment algorithms are generally avoided on conventional architectures due to their computational complexity, they can be tailored for efficient implementation on systolic architectures. We describe and implement the first system capable of assembling large genomes using DP. We implemented application-specific DP algorithms for aligning data from ultra-high-throughput sequencers in a reconfigurable computing cluster. To obtain the necessary throughput while maintaining scoring integrity, we extended the compact encoding scheme of Lipton and Lopresti for our application. Each FPGA is capable of rapidly aligning multiple reads in parallel against a long reference genome. The reconfigurable cluster proves to be scalable and capable of processing real world datasets with a sustained performance of 11 tera cell updates per second. We examine the advantages and practicality of our system by benchmarking real genomic data from a large sequencing project. Our exhaustive validation confirms that application specific computing hardware can provide more accurate results than current heuristic methods and remain practical. While directly addressing the important problem of genomic assembly, particularly in circumstances where error rates or evolutionary divergence is high, the methods presented are also relevant to many other current applications for this type of data.

Restricted Boltzmann machines (RBMs)- the building block for newly popular deep belief networks (DBNs) - are a promising new tool for machine learning practitioners. However, future research in applications of DBNs is hampered by the considerable computation that training requires. In this paper, we describe a novel architecture and FPGA implementation that accelerates the training of general RBMs in a scalable manner, with the goal of producing a system that machine learning researchers can use to investigate ever-larger networks. Our design uses a highly efficient, fully-pipelined architecture based on 16-bit arithmetic for performing RBM training on an FPGA. We show that only 16-bit arithmetic precision is necessary, and we consequently use embedded hardware multiply-and-add (MADD) units. We present performance results to show that a speedup of 25-30X can be achieved over an optimized software implementation on a high-end CPU.