Demo Data from EDBT 2026 / reviewers in the wild / expert
Share Young Lee
dblp:95/1785
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1979
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 50% Integrated circuit design · 50% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
associative search |
0.0 | 1 | 1979 | Associative-Search Bubble Devices for Content-Addressable Memory and Array Logic · IEEE Trans. Computers 1979 |
Memory systems
content-addressable memory |
0.0 | 1 | 1979 | Associative-Search Bubble Devices for Content-Addressable Memory and Array Logic · IEEE Trans. Computers 1979 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1979 | Associative-Search Bubble Devices for Content-Addressable Memory and Array Logic · IEEE Trans. Computers 1979 |
Integrated circuit design › digital circuit design
logic array |
0.0 | 1 | 1979 | Associative-Search Bubble Devices for Content-Addressable Memory and Array Logic · IEEE Trans. Computers 1979 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1979 | Associative-Search Bubble Devices for Content-Addressable Memory and Array LogicabstractBubble latches (switches with memory capability) provide very simple associative-search devices in shift-register type memories. Such devices allow a simple implementation of content-addressable memories (CAM's), only requiring small addition of area, circuits, and interconnections to those of a conventional shift-register memory. Moreover, such devices, in combination with a multi-input or circuit, implements a versatile logic array. Share Young Lee, Hsu Chang |
IEEE Trans. Computers | 1 |