With the explosion of the number of compute nodes, the bottleneck of future computing systems lies in the network architecture connecting the nodes. Addressing the bottleneck requires replacing current backplane-based network topologies. We propose to revolutionize computing electronics by realizing embedded optical waveguides for onboard networking and wireless chip-to-chip links at 200-GHz carrier frequency connecting neighboring boards in a rack. The control of novel rate-adaptive optical and mm-wave transceivers needs tight interlinking with the system software for runtime resource management.

This paper presents Si/SiGe:C and InP/GaAsSb HBTs which feature specific assets to address submillimeter-wave and THz applications. Process and modeling status and challenges are reviewed. The specific topics of thermal and substrate effects, reliability, and HF measurements are also discussed.

With the advent and fast-paced development of ultrahighspeed digital interconnects for next-generation computing systems, low-latency broadband wireless communications for fifth generation and beyond, high-resolution imaging techniques and emerging parametric sensing systems for medical/biomedical and security applications, material and structure analyses and evaluations, and deep-space radio astrophysics, and so on, the search for system solutions with larger bandwidth has sparked a growing research in expanding the electromagnetic spectrum into the terahertz (THz) regime. Generally, the THz frequency covers 300 GHz through 10 THz, which presents the most fundamental spect rum gap between elect ronics and photonics.

A technology roadmap for the electrical performance of high-speed silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) is presented based on combining the results of various 1-D, 2-D, and 3-D technology computer-aided design (TCAD) simulation tools with geometry scalable compact modeling. The latter, including all known parasitic effects, enables the accurate determination of the figures of merit for both devices and selected benchmark circuits. The presented roadmap defines five major technology nodes with the maximum oscillation frequency of a typical high-frequency device structure as the main device design target under the constraints of various other parameters for generating the doping profiles and for defining the lateral scaling factors. An extensive and consistent set of technology and electrical parameters is provided along with the obtained scaling rules. The expected fabrication-related challenges and possible solutions for achieving the predicted performance are being discussed. It is hoped that the presented roadmap will be useful not only for foundries and equipment manufacturers but also for circuit and system designers enabling better predictions of the capability of SiGe-BiCMOS process technology for new millimeter-wave (mm-wave) and terahertz (THz) applications.