In this paper we investigate two aspects regarding the detection of stuck-open (SOP) faults using stuck-at test sets. First, we measure the SOP fault coverage of stuck-at test sets for various CMOS combinational circuits. The SOP fault coverage is compared with that of random pattern test sets. Second, we propose a method to improve the SOP fault coverage of stuck-at test sets by organizing the test sequence of stuck-at test sets. The performance of the proposed method is compared with that of a competing method. Experimental results show that the proposed method leads to smaller test sets and shorter processing time while achieving high SOP fault coverage.

Signature registers are commonly used to collect test responses in built-in self-testing (BIST). If the contents of signature registers can be used as test patterns, the overall testing time can be reduced due to improved testing parallelism. Moreover, the number of extra registers for implementing BIST could be reduced. Here, the characteristics of the patterns generated by signature registers are studied through analyses as well as experiments. It is shown that the patterns generated by signature registers are rarely repeated when the number of test patterns is relatively small compared to the number of possible patterns. It is also shown that the patterns generated are almost uniformly distributed. Therefore, signature registers can be used effectively as pseudorandom pattern generators. The practicality of using signature registers as pseudorandom pattern generators is investigated by fault simulation experiments using an example circuit.>