One of the main problems of the CORDIC algorithm is the limited convergence domain, in which the functions can be calculated. Two different approaches can be employed to overcome this constraint: first, an argument reduction method and, second, an expansion of the CORDIC convergence domain. While the first approach requires significant processing overhead due to the need for divisions especially for tanh/sup -1/, the second technique achieves an increased but still limited convergence domain only. In this brief contribution, we present a unified division-free argument reduction method and a regular pipeline/array architecture for floating point or fixed point implementations which results in savings of computation time. In contrast to previous methods we avoid extra CORDIC arithmetic for realization of argument reduction.>

Several methods for increasing the speed of the CORDIC algorithm are presented. First, an improved method which guarantees a constant scale factor when employing redundant addition schemes is developed. Then, an architecture with increased parallelism which considerably reduces the CORDIC latency time and the amount of hardware is described.>