Nicola Bonelli

dblp:95/4569 · DBLP profile ↗
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10ranked-venue papers
6as first author
0since 2021 · last 2020
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 7 · 4 first-authorSecurity and privacy · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
2 papers
Network measurement and analytics · 47% Routing and switching · 24% Software-defined and programmable networks · 24%
Software engineering, system software, and programming languages
1 paper
Operating systems · 100%

Topics — the 4 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Routing and switching › data plane › router data plane
high-speed packet processing
0.212016
Network Traffic Processing With PFQ · IEEE J. Sel. Areas Commun. 2016
Network measurement and analytics
anomaly detection
0.212013
Toward composable network traffic measurement · INFOCOM 2013
Network measurement and analytics
traffic analysis
0.212013
Toward composable network traffic measurement · INFOCOM 2013
Network measurement and analytics › traffic measurement
traffic monitoring
0.212013
Toward composable network traffic measurement · INFOCOM 2013

Methods — techniques the papers use, named apart from their topics

performance benchmarking · 0.5kernel module design · 0.5intrusion detection · 0.2flow metering · 0.2
YearPublicationVenuePosition
2020 The road to BOFUSS: The basic OpenFlow userspace software switch
Eder Leão Fernandes, Elisa Rojas, Joaquin Alvarez-Horcajo, Zoltán Lajos Kis, Davide Sanvito, Nicola Bonelli, Carmelo Cascone, Christian Esteve Rothenberg
J. Netw. Comput. Appl.6
2018 Packet Fan-Out Extension for the pcap Library
abstract
The large availability of multi-gigabit network cards for commodity PCs requires network applications to potentially cope with high volumes of traffic. However, computation intensive operations may not catch up with high traffic rates and need to be run in parallel over multiple processing cores. As of today, the vast majority of network applications-e.g., monitoring and IDS systems-are still based on the pcap library interface which, unfortunately, does not provide the native multi-core support, even though the current underlying capture technologies do. This paper introduces a novel version of the pcap library for the Linux operating system that enables transparent application level parallelism. The new library supports fan-out operations for both multi-threaded and multi-process applications, by means of extended API as well as by a declarative grammar for configuration files, suitable for legacy applications. In addition, the library can transparently run on top of the standard Linux socket as well as on other accelerated active engines. Performance evaluation has been carried out on a multi-core architecture in pure capture tests and in more realistic use cases involving monitoring applications such as Tstat and Bro, with standard Linux socket as well as PF_RING and PFQ accelerated engines.
Nicola Bonelli, Fabio Del Vigna, Stefano Giordano, Gregorio Procissi
IEEE Trans. Netw. Serv. Manag.1
2017 Towards approximate fair bandwidth sharing via dynamic priority queuing
abstract
We tackle the problem of a network switch enforcing fair bandwidth sharing of the same link among many TCP-like senders. Most of the mechanisms to solve this problem are based on complex scheduling algorithms, whose feasibility becomes very expensive with today's line rate requirements, i.e. 10-100 Gbit/s per port. We propose a new scheme called FDPA in which we do not modify the scheduler, but instead we use an array of rate estimators to dynamically assign traffic flows to an existing strict priority scheduler serving only few queues. FDPA is inspired by recent advances in programmable stateful data planes. We propose a design that uses primitives common in data plane abstractions such as P4 and OpenFlow. We conducted experiments on a physical 10 Gbit/s testbed, we present preliminary results showing that FDPA produces fairness comparable to approaches based on scheduling.
Carmelo Cascone, Nicola Bonelli, Luca Bianchi, Antonio Capone, Brunilde Sansò
LANMAN2
2017 A pipeline functional language for stateful packet processing
abstract
The evolution of commodity PCs towards multi-core processing platforms equipped with high-speed network interfaces makes them reasonable and cost effective targets for the implementation of generic network functions. In addition, the availability of software accelerated I/O frameworks provides a convenient ground for running a broad variety of applications, from simple software switches to more complex network systems, with near hardware-class performance and the flexibility of a software approach. Most network functions can be implemented by composing a set of elementary operations into processing pipelines to be run on top of multiple processing cores. In this framework, maintaining the flow consistency is crucial to enable stateful operations in the processing pipelines. This paper presents Enif-Lang, a functional language for programming network pipelines specifically targeted at multi-core scenarios. In addition to a large set of functions for generic packet manipulation, filtering, steering and state management, the framework is built upon an abstract model that provides state aware packet splitting to prevent inter-state sharing and enable consistent stateful parallel processing on-top-of multi-core architectures.
Nicola Bonelli, Stefano Giordano, Gregorio Procissi
NetSoft1
2016 Network Traffic Processing With PFQ
abstract
This paper presents Packet Family Queue (PFQ), a high-performance framework for packet processing designed to flexibly handle network applications parallelism and making traffic processing safe and easy. PFQ is an open-source module for the Linux kernel that combines software-accelerated packet I/O to in-kernel early stage packet processing and fine-grained distribution to network applications and physical devices. PFQ does not require any modification to network device drivers and exposes programming interfaces to multi-threaded applications natively designed to run on top of it, as well as to legacy monitoring tools using the pcap library. The results show that the flexibility and the backward compatibility provided by PFQ do not impact its processing performance that, in fact, reaches line rate figures in the cases of pure speed tests and real practical monitoring use cases on 10+ Gb/s links.
Nicola Bonelli, Stefano Giordano, Gregorio Procissi
IEEE J. Sel. Areas Commun.1
2014 A purely functional approach to packet processing
abstract
Today's rapidly evolving network ecosystem, characterized by increasing traffic volumes, service heterogeneity and mutating cyber-threats, calls for new approaches to packet processing to address key issues such as scalability, flexibility, programmability and fast deployment. To this aim, this paper explores a new direction to packet processing by pushing forward functional programming principles in the definition of a ''software defined networking'' paradigm.
Nicola Bonelli, Stefano Giordano, Gregorio Procissi, Luca Abeni
ANCS1
2013 On memory allocation for high-speed packet analysis applications
abstract
The evolution of commodity hardware makes it a very attractive platform to develop high-performance networking applications that are affordable to deploy. All but the most trivial applications must copy packets into user-space for further analysis. Therefore, the allocation of memory for these copies becomes a performance-critical operation. In this work, we present a multi-layer slice memory allocator specifically designed to take advantage of spatial and temporal locality in dealing with high-speed packet processing applications. Experimental results show that the proposed approach clearly outperforms existing memory allocators in common networking use-cases.
Nicola Bonelli, Loris Gazzarrini, Stefano Giordano, Gregorio Procissi, Brian Trammell
ICC1
2013 Toward composable network traffic measurement
abstract
As the growth of Internet traffic volume and diversity continues, passive monitoring and data analysis, crucial to the correct operation of networks and the systems that rely on them, has become an increasingly difficult task. We present the design and implementation of Blockmon, a flexible, high performance system for network monitoring and analysis. We present experimental results demonstrating Blockmon's performance, running simple analyses at 10Gb/s line rate on commodity hardware; and compare its performance with that of existing programmable measurement systems, showing significant improvement (as much as twice as fast) especially for small packet sizes. We further demonstrate Blockmon's applicability to measurement and data analysis by implementing and evaluating three sample applications: a flow meter, a TCP SYN flood detector, and a VoIP anomaly-detection system.
Andrea Di Pietro, Felipe Huici, Nicola Bonelli, Brian Trammell, Petr Kastovsky, Tristan Groleat, Sandrine Vaton, Maurizio Dusi
INFOCOM3
2012 On Multi-gigabit Packet Capturing with Multi-core Commodity Hardware
Nicola Bonelli, Andrea Di Pietro, Stefano Giordano, Gregorio Procissi
PAM1
2011 Scaling Regular Expression Matching Performance in Parallel Systems through Sampling Techniques
abstract
Modern network devices need to perform deep packet inspection at high speed for security and application- specific services. For this purpose, regular expressions are used, due to their high expressive power, and Deterministic Finite Automata (DFAs) are adopted to match them. Many works have been proposed to improve DFAs, especially in terms of memory consumption and speed. Instead, we address another issue: the scalability of DFAs to parallel systems and their buffer requirements. To our knowledge, a single attempt to parallelize DFA walk on regular multicore systems (which ex- ploits speculation with limited efficiency) has been proposed in literature. We propose a solution in which a number of processing units are committed to walk in parallel a DFA for the same packet; at this aim, sampling techniques on both text and regular expressions are adopted. This scheme is the first in literature that proposes effective parallelization of DFA walk, hence allowing for packet processing time reduction and less memory for reordering buffers. The result is that speed scales as the number of processing units.
Domenico Ficara, Gianni Antichi, Fabio Vitucci, Nicola Bonelli, Andrea Di Pietro, Stefano Giordano, Gregorio Procissi
GLOBECOM4