This work describes the Semiconductor Wafer Representation (SWR) for representing and manipulating wafer state during process and device simulation. The goal of the SWR is to provide an object-oriented interface to a collection of functions designed for developing and integrating Technology CAD (TCAD) applications. By providing functions which can be common across many applications, we aim to greatly reduce tool development and integration time. Corporate, vendor, and university TCAD developers have worked together under the auspices of the CAD Framework Initiative to create an architecture and C++ programming interface for an SWR 1.0 draft standard. Here we describe this architecture and the results of creating and using a prototype implementation of the standard both to integrate existing TCAD tools and to develop simple new tools.>

An integrated process simulation system which uses functional utilities to integrate disparate 2-D simulation tools is described. The software utilities provide mechanisms for simulator input generation and user interaction, for mapping between different cross-section formats, and for output visualization. The specific utilities are described. With this approach, several process simulators for lithography, etching, deposition, and thermal processing have been integrated into a unified system, SIMPL-IPX (simulation of profiles from the layout-integrated process simulation environment with X-Windows). Simulation examples for metal l planarization, bipolar technology with a polysilicon , collector 5 plug, and advanced lithography are presented to demonstrated 7 the usefulness of this approach to technology CAD tool 8 integration. Methods for improved data management using 9 a CAD framework are described.>

Article Free Access Share on Linking TCAD to EDA—benefits and issues Authors: G. Chin Stanford University, Stanford, CA Stanford University, Stanford, CAView Profile , W. Dietrich Stanford University, Stanford, CA Stanford University, Stanford, CAView Profile , D. Boning Texas Instruments, Dallas, TX Texas Instruments, Dallas, TXView Profile , A. Wong University of California at Berkeley, Berkeley, CA University of California at Berkeley, Berkeley, CAView Profile , A. Neureuther University of California at Berkeley, Berkeley, CA University of California at Berkeley, Berkeley, CAView Profile , R. Dutton Stanford University, Stanford, CA Stanford University, Stanford, CAView Profile Authors Info & Claims DAC '91: Proceedings of the 28th ACM/IEEE Design Automation ConferenceJune 1991 Pages 573–578https://doi.org/10.1145/127601.127735Published:01 June 1991Publication History 5citation247DownloadsMetricsTotal Citations5Total Downloads247Last 12 Months22Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

A 3-D device solver (STRIDE), capable of solving grids up to 250,000 nodes, has been developed on a message passing multiprocessor. By the use of iterative matrix solvers and Gummel style nonlinear iteration schemes, user memory per node is reduced over use of direct solvers and Newton schemes. By using an independent-edge-grouping scheme to increase the vector length to the order of the number of variables, the vector processing efficiency is significantly increased without additional floating point operations. The modified-singular-perturbation (MSP) scheme is extended to two-carrier simulations. This significantly speeds up the convergence rate of Gummel style nonlinear iterations. Physical insight gained from the MSP schemes also leads to an automatic switching scheme between various nonlinear schemes based on the monitoring of certain matrix parameters. Application of STRIDE is demonstrated by an analysis of latchup trigger current dependence on layout arrangement.>