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Jianyu Zhao 0004

dblp:96/1031-4 · DBLP profile ↗
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3ranked-venue papers
1as first author
3since 2021 · last 2026
0009-0006-4175-760XORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author · 3 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
GPUs and heterogeneous computing · 50% Hardware accelerators and domain-specific architectures · 50%
Software engineering, system software, and programming languages
2 papers
Compilers and program optimization · 100%
Network and information security
3 papers
Cryptographic primitives and cryptanalysis · 82% Cryptographic protocols and secure computation · 18%

Topics — the 10 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
GPUs and heterogeneous computing
GPU computing
1.822026
A Framework for Developing and Optimizing Fully Homomorphic Encryption Programs on GPUs · ASPLOS (2) 2026
A Compiler-Like Framework for Optimizing Cryptographic Big Integer Multiplication on GPUs · MICRO 2024
Cryptographic primitives and cryptanalysis › homomorphic encryption
fully homomorphic encryption
1.012026
A Framework for Developing and Optimizing Fully Homomorphic Encryption Programs on GPUs · ASPLOS (2) 2026
Hardware accelerators and domain-specific architectures
cryptographic accelerator
0.912025
Accelerating Number Theoretic Transform with Multi-GPU Systems for Efficient Zero Knowledge Proof · ASPLOS (1) 2025
GPUs and heterogeneous computing
multi-GPU computing
0.912025
Accelerating Number Theoretic Transform with Multi-GPU Systems for Efficient Zero Knowledge Proof · ASPLOS (1) 2025
Hardware accelerators and domain-specific architectures › cryptographic accelerator
number theoretic transform
0.912025
Accelerating Number Theoretic Transform with Multi-GPU Systems for Efficient Zero Knowledge Proof · ASPLOS (1) 2025
Hardware accelerators and domain-specific architectures › cryptographic accelerator
zero-knowledge proof accelerator
0.912025
Accelerating Number Theoretic Transform with Multi-GPU Systems for Efficient Zero Knowledge Proof · ASPLOS (1) 2025
Compilers and program optimization
code generation
0.812024
A Compiler-Like Framework for Optimizing Cryptographic Big Integer Multiplication on GPUs · MICRO 2024
Compilers and program optimization › code generation › parallel code generation
GPU kernel generation
0.812024
A Compiler-Like Framework for Optimizing Cryptographic Big Integer Multiplication on GPUs · MICRO 2024
Compilers and program optimization
compiler optimization
0.312026
A Framework for Developing and Optimizing Fully Homomorphic Encryption Programs on GPUs · ASPLOS (2) 2026
Cryptographic protocols and secure computation › proof systems
zero-knowledge proofs
0.312025
Accelerating Number Theoretic Transform with Multi-GPU Systems for Efficient Zero Knowledge Proof · ASPLOS (1) 2025

Methods — techniques the papers use, named apart from their topics

two-dimensional parallelization · 2.3segmented integer multiplication · 2.3lazy carrying · 2.3caching strategy · 2.3permutation-aware data layout · 1.7multi-GPU parallelization · 1.7
YearPublicationVenuePosition
2026 A Framework for Developing and Optimizing Fully Homomorphic Encryption Programs on GPUs
abstract
In sensitive domains such as healthcare and finance, machine learning increasingly employs Fully Homomorphic Encryption (FHE) to secure both user data and models. Although FHE's intrinsic parallelism naturally aligns with GPU architectures, optimizing GPU kernels alone remains insufficient for efficient end-to-end FHE application development. The inherent complexity of FHE schemes and intricate GPU-specific details impede developers from focusing on high-level program logic. Additionally, FHE's high memory requirements, fine-grained memory operations, and redundant computations introduce further optimization challenges, resulting in inefficiencies even when GPU kernels are individually optimized. This paper introduces EasyFHE, a framework designed to simplify the development and optimization of GPU-accelerated FHE applications. Similar to PyTorch, EasyFHE provides high-level interfaces for defining computational logic while automatically handling low-level tasks, such as implementation selection and memory management. Furthermore, it incorporates an optimization framework that systematically addresses performance bottlenecks by applying tailored optimization passes during the lowering from high-level FHE programs to GPU kernels. Compared to state-of-the-art open-source GPU FHE libraries, EasyFHE uniquely supports FHE programs with memory requirements exceeding typical GPU capacities, achieving an average speedup of 2.88× with a peak of 4.39×.
Jianyu Zhao 0004, Xueyu Wu 0001, Guang Fan 0001, Mingzhe Zhang 0005, Shoumeng Yan, Lei Ju 0001, Zhuoran Ji
ASPLOS (2)1
2025 Accelerating Number Theoretic Transform with Multi-GPU Systems for Efficient Zero Knowledge Proof
abstract
Zero-knowledge proofs validate statements without revealing any information, pivotal for applications such as verifiable outsourcing and digital currencies. However, their broad adoption is limited by the prolonged proof generation times, mainly due to two operations: Multi-Scalar Multiplication (MSM) and Number Theoretic Transform (NTT). While MSM has been efficiently accelerated using multi-GPU systems, NTT has not, due to the high inter-GPU communication overhead incurred by its permutation data access pattern.
Zhuoran Ji, Jianyu Zhao 0004, Peimin Gao, Xiangkai Yin, Lei Ju 0001
ASPLOS (1)2
2024 A Compiler-Like Framework for Optimizing Cryptographic Big Integer Multiplication on GPUs
abstract
With the growth of digital data and rising security concerns, techniques for privacy-preserving computation have become increasingly essential. Big integer multiplication, pivotal for these applications, is compute-intensive but poses challenges for GPU acceleration due to its complexity and the need for application-specific tailored implementations. This paper presents IMCompiler, a compiler-like framework that automatically gen-erates optimized GPU kernels for integer multiplications used in cryptosystems. It features a frontend-IR-backend structure, where the Intermediate Representation (IR) employs a segmented integer multiplication algorithm to decouple architecture-specific optimizations from high-level parameters. The frontend can then easily translate integer multiplication with various high-level parameters into the IR, while the backend focuses on fine-tuning a single GPU kernel for each device, enabling automatic code generation. Moreover, we introduce a computation diagram to facilitate the analysis of parallelization strategies, inspiring many optimizations, including two-dimensional parallelization, tailored caching strategy, index transposing, and lazy carrying. Experiments show that IMCompiler achieves a 4.47× speedup compared to the widely used baseline and 1.42 × over Nvidia's official library. The speedup will be even higher for larger integers and higher-capacity GPUs.
Zhuoran Ji, Jianyu Zhao 0004, Jiming Xu, Shoumeng Yan, Lei Ju 0001
MICRO2