Application migration is a key enabling technology component of mobile computing that allows rich semantics involving location awareness, trust and timeliness of information processing by moving the application where the data is. Seamlessness is one of the key properties of mobile computing and downtime must be eliminated/minimized during the migration to achieve seamlessness. But migration involves large overheads, dominant of which are the overheads due to serialization and de-serialization [1]. To achieve seamless migration, an application state could be pre-serialized during the program's execution, and upon migration, the serialized data could be transmitted and de-serialized to get the execution started. Previous approach to this problem [1] removed dead state but still suffered from large migration overheads due to serialization on-demand that could lead to an unacceptable downtime.In this work, we develop a static compiler analysis plus runtime assisted framework to decrease the migration overhead to almost zero while minimizing the degradation in the program's performance. We achieve such a goal by deciding which data to be pre-serialized through analysis, and pre-serializing the state in the program. A safe state is kept that would allow immediate migration upon the arrival of an interrupt while minimizing frequent pre-serialization. When the migration interrupt comes in, the serialized data can be transmitted directly to the destination machine. This allows an application to resume its execution at the destination machine with almost no interruption (only a small amount of non-serialized data needs to be serialized during migration). The optimization serializes the data in such a way that a maximal number of functions can execute without interruption after migration. Our experiments with multimedia applications show that the migration latency is significantly reduced leading to a small downtime. Thus, the contribution of the paper is to provide an efficient methodology to perform seamless migration while limiting the overhead.

Current anomaly detection schemes focus on control flow monitoring. Recently, Chen et al. discovered that a large category of attacks tamper program data but do not alter control flows. These attacks are not only realistic, but are also as important as classical attacks tampering control flows. Detecting these attacks is a critical issue but has received little attention so far. In this work, we propose an intrusion detection scheme with both compiler and micro-architecture support detecting data tampering directly. The compiler first identifies program regions in which the data should not be modified as per program semantics. Then the compiler performs an analysis to determine the conditions for modification of variables in different program regions and conveys this information to the hardware and the hardware checks the data accesses based on the information. If the compiler asserts that the data should not be modified but there is an attempt to do so at runtime, an attack is detected. The compiler starts with a basic scheme achieving maximum data protection but such a scheme also suffers from high performance overhead. We then attempt to reduce the performance overhead through different optimization techniques. Our experiments show that our scheme achieves strong memory protection with tight control over the performance degradation. Thus, our major contribution is to provide an efficient scheme to detect data tampering while minimizing the overhead

Mobile computing based upon wireless technology as the interconnect and PDAs, Web-enabled cell phones etc. as the end devices provide a rich infrastructure for anywhere, anytime information access. Wireless connectivity also poses tough problems [11, 12]. Network nodes may be mobile and the connectivity could be sporadic. In many cases, application mobility involving migration from one network node to another could provide interesting possibilities. However, the migration process is expensive in terms of both time and power overheads. To minimize the migration cost, an efficient strategy must decide which parts of the program should migrate to continue execution and at which program point the migration should take place.In this work we develop a compiler framework to achieve the above two goals. First, the potential migration points are decided by analyzing the call chains in the code. Then the compiler determines what parts of the program are dead at these points. At run time, using the current context of the call chain, a decision on whether to migrate now or later is taken. Such a decision depends mainly upon the cost of migration involved at the current program point vs. at a later potential migration point. Our experiments with multimedia applications show that both the migration state and the latency are significantly reduced by our techniques over the base case of migration with full state in the absence of any compiler guidance. Thus, the key contribution of the paper is to provide an efficient migration methodology removing barriers to application mobility.

Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both high and low-end) tend to deploy a cache with large size and high degree of associativity. Due a large size cache power takes up a significant percentage of total system power. One important way to reduce cache power consumption is to reduce the dynamic activities in the cache by reducing the dynamic load-store counts. In this work, we focus on programs that are only available as binaries which need to be improved for energy efficiency. For adapting these programs for energy-constrained devices, we propose a feed-back directed post-pass solution that tries to do register re-allocation to reduce dynamic load/store counts and to improve energy-efficiency. Our approach is based on zero knowledge of original code generator or compiler and performs a post-pass register allocation to get a more power-efficient binary. We attempt to find out the dead as well as unused registers in the binary and then re-allocate them on hot paths to reduce dynamic load/store counts. It is shown that the static code size increase due to our framework is very minimal. Our experiments on SPEC2000 and MediaBench show that our technique is effective. We have seen dynamic spill loads/stores reduction in the data-cache ranging from 0% to 26.4%. Overall, our approach improves the energy-delay product of the program.