Depth first search (DFS) tree is a fundamental data structure for solving various graph problems. The classical DFS algorithm requires $O(m+n)$ time for a graph having $n$ vertices and $m$ edges. In the streaming model, an algorithm is allowed several passes (preferably single) over the input graph having a restriction on the size of local space used. Trivially, a DFS tree can be computed using a single pass using $O(m)$ space. In the semi-streaming model allowing $O(n)$ space, it can be computed in $O(n)$ passes, where each pass adds one vertex to the DFS tree. However, it remains an open problem to compute a DFS tree using $o(n)$ passes using $o(m)$ space even in any relaxed streaming environment. We present the first semi-streaming algorithms that compute a DFS tree of an undirected graph in $o(n)$ passes using $o(m)$ space. We first describe an extremely simple algorithm that requires at most $\lceil n/k\rceil$ passes using $O(nk)$ space, where $k$ is any positive integer. We then improve this algorithm by using more involved techniques to reduce the number of passes to $\lceil h/k\rceil$ under similar space constraints, where $h$ is the height of the computed DFS tree. In particular, this algorithm improves the bounds for the case where the computed DFS tree is shallow (having $o(n)$ height). Moreover, this algorithm is presented as a framework that allows the flexibility of using any algorithm to maintain a DFS tree of a stored sparser subgraph as a black box, which may be of independent interest. Both these algorithms essentially demonstrate the existence of a trade-off between the space and number of passes required for computing a DFS tree. Furthermore, we evaluate these algorithms experimentally which reveals their exceptional performance in practice. For both random and real graphs, they require merely a few passes even when allowed just $O(n)$ space.

A new symbolic approach models the sensitization paths to selected primary output(s) as Boolean equations, with satisfying solutions representing the set of all sources of single and multiple sensitizations in the circuit. The paper discusses two applications of this idea: model-free fault diagnosis and input sensitization analysis.

In this paper, we investigate the link flexibility constraints imposed on the deployment of the optical wireless Internet. We formulate the topology control problem under link delay conditions, and accordingly propose a new optimization algorithm for networks with two-transceiver nodes. Simulation results show that networks applying the proposed algorithm achieve a reduction in average packet delay up to 55% over networks with rigid topologies.

In simulation based design verification, deterministic or pseudo-random tests are used to check functional correctness of a design. In this paper we present a technique generating tests by specifying the don't care inputs in the functional specifications so as to improve their coverage of both design errors and manufacturing faults. The don't cares are chosen to maximize sensitization of signals in the circuit. The tests generated in this way require only a fraction of pseudo-exhaustive test patterns to achieve a high multiplicity of fault coverage.

A new method is proposed for improving the testability of a finite state machine (FSM) during its synthesis. The method exploits clock control to enhance the controllability and observability of machine states. With clock control it is possible to add new state transitions during testing. Therefore, it is easier to navigate between states in the resulting test machine. Unlike prior work, where clock control is added to the circuit as a post-design step, here, clock control is considered in conjunction with a symbolic scheme for encoding the states of the FSM. The encoding is shown to result in significant reductions in the interstate distances in the benchmark FSM's. Further, the observability of the encoded states can be improved by adding two primary outputs to the circuit such that a fixed input sequence forms a distinguishing sequence for all states. Theoretical results show that for a large class of FSM's, the testability improvements are comparable to those achievable by scan designs. Experimental results show that available test pattern generation tools are able to take advantage of the enhanced testability in producing shorter test sequences, particularly for machines with poor connectivity of states.

We propose a new synthesis technique for finite state machines that improves their testability by disabling the clock to a subset of the flip-flops. Distance-matrix results with and without the clock control demonstrate dramatic improvement in the average and worst-case distances between pairs of states. The experimental results using available sequential ATPG tools further verify that the scheme allows significantly shorter tests to be generated with comparable fault coverage.

A network of analog neurons to solve the Hamiltonian cycle problem (HCP) is described. This neural net is a modification of the network proposed by Hopfield to solve the traveling salesman problem (TSP). A result on the convergence of quasi-stationary flow and a bound for the strength of an inhibitory self-connection are presented. Results of successful experiments with graphs of up to 500 nodes are reported. The result of an experiment with the 318-city TSP is also reported. Contrary to intuition, the performance improves with the size of the graphs. The 20-node graphs fail to give consistent results for 10% connectivity, while 400- and 500-node graphs were solved successfully