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Rui Li 0103

dblp:96/4282-103 · DBLP profile ↗
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5ranked-venue papers
3as first author
2since 2021 · last 2025
0000-0002-5683-9441ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author · 2 since 2021Computer networks · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 54% Distributed systems · 46%
Computer networks
1 paper
Edge and fog computing · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
high-level synthesis
1.722025
PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis · FPGA 2025
PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis · DAC 2025
Distributed systems
resource sharing
1.722025
PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis · FPGA 2025
PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis · DAC 2025
Edge and fog computing › mobile edge computing
computation offloading
0.312018
FoggyCache: Cross-Device Approximate Computation Reuse · MobiCom 2018
Electronic design automation › logic synthesis
asynchronous circuit synthesis
0.312025
PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis · DAC 2025

Methods — techniques the papers use, named apart from their topics

pipelining · 2.6handshake protocol · 1.7dataflow circuit · 1.7modular synthesis · 0.9distributed control · 0.9locality-sensitive hashing · 0.3k-nearest neighbors · 0.3
YearPublicationVenuePosition
2025 PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis
abstract
Dynamically scheduled high-level synthesis (HLS) is an approach to HLS that maps programs into dataflow circuits. These circuits use distributed control for communication and therefore can be automatically pipelined. However, pipelined function call is challenging due to the absence of centralized control, thus general software programs cannot be well-supported by the HLS tools. Traditional solutions to this problem impose restrictions on pipelining when accessing the shared functions. We present PipeLink, a modular synthesis method that decomposes the synthesis into compilation stage and linking stage, which enables the fully-pipelined access to shared functions in dataflow circuits. We develop a complete HLS engine using this approach and use asynchronous circuits as the target implementation. Our engine supports pipelined access to shared function units, as well as pipelined memory access in a unified fashion. Compared to existing HLS tools, PipeLink results in 20X reduction in energy and 1.56 X improvement in throughput.
Rui Li 0103, Lincoln Berkley, Rajit Manohar
DAC1
2025 PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis
abstract
High-level synthesis (HLS) has received significant interest in hardware accelerator design due to its ability to reduce design time and make hardware design more accessible to software developers [3]. HLS methodologies can be categorized into two main approaches: statically scheduled HLS [2, 4] and dataflow HLS [5, 6]. Statically scheduled HLS requires precise operator delay information at synthesis time to generate optimized schedules, which often lead to suboptimal performance under dynamic workloads. In contrast, dataflow HLS maps programs into dataflow circuits composed of concurrent, independent elements that communicate using local control protocols (e.g., handshake or ready/valid). While dataflow HLS enables automatic pipelining without requiring global control, the lack of centralized coordination complicates efficient resource sharing.
Rui Li 0103, Rajit Manohar
FPGA1
2019 Libra and the Art of Task Sizing in Big-Data Analytic Systems
abstract
Despite extensive investigation of job scheduling in data-intensive computation frameworks, less consideration has been given to optimizing job partitioning for resource utilization and efficient processing. Instead, partitioning and job sizing are a form of dark art, typically left to developer intuition and trial-and-error style experimentation.
Rui Li 0103, Peizhen Guo, Bo Hu 0030
SoCC1
2018 FoggyCache: Cross-Device Approximate Computation Reuse
abstract
Mobile and IoT scenarios increasingly involve interactive and computation intensive contextual recognition. Existing optimizations typically resort to computation offloading or simplified on-device processing. Instead, we observe that the same application is often invoked on multiple devices in close proximity. Moreover, the application instances often processsimilar contextual data that map to thesame outcome. In this paper, we proposecross-device approximate computation reuse, which minimizes redundant computation by harnessing the "equivalence'' between different input values and reusing previously computed outputs with high confidence. We devise adaptive locality sensitive hashing (A-LSH) and homogenized k nearest neighbors (H-kNN). The former achieves scalable and constant lookup, while the latter provides high-quality reuse and tunable accuracy guarantee. We further incorporate approximate reuse as a service, called \name, in the computation offloading runtime. Extensive evaluation shows that, when given 95% accuracy target, \name\ consistently harnesses over 90% of reuse opportunities, which translates to reduced computation latency and energy consumption by a factor of 3 to 10.
Peizhen Guo, Bo Hu 0030, Rui Li 0103
MobiCom3
2016 Skolem Sequence Based Self-Adaptive Broadcast Protocol in Cognitive Radio Networks
abstract
The base station (BS) in a multi-channel cognitive radio (CR) network has to broadcast to secondary (or unlicensed) receivers/users on more than one broadcast channels via channel hopping (CH), because a single broadcast channel can be reclaimed by the primary (or licensed) user, leading to broadcast failures. Meanwhile, a secondary receiver needs to synchronize its clock with the BS's clock to avoid broadcast failures caused by the possible clock drift between the CH sequences of the secondary receiver and the BS. In this paper, we propose a CH-based broadcast protocol called SASS, which enables a BS to successfully broadcast to secondary receivers over multiple broadcast channels via channel hopping. Specifically, the CH sequences are constructed on basis of a mathematical construct- the Self-Adaptive Skolem Sequence (SASS). Moreover, each secondary receiver under SASS is able to adaptively synchronize its clock with that of the BS without any information exchanges, regardless of any amount of clock drift.
Lin Chen 0003, Zhiping Xiao 0001, Kaigui Bian, Shuyu Shi, Rui Li 0103, Yusheng Ji
VTC Spring5