Demo Data from EDBT 2026 / reviewers in the wild / expert
Jinhan Fan
dblp:97/9427
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2011
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% | |
| Computer networks
1 paper |
Physical-layer communications · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › radio-frequency circuit design
RF transmitter design |
0.1 | 1 | 2011 | A current-mode RF transmitter for 6-9 GHz MB-OFDM UWB application · Sci. China Inf. Sci. 2011 |
Physical-layer communications › spread spectrum
ultra-wideband communication |
0.0 | 1 | 2011 | A current-mode RF transmitter for 6-9 GHz MB-OFDM UWB application · Sci. China Inf. Sci. 2011 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2011 | A current-mode RF transmitter for 6-9 GHz MB-OFDM UWB application
Jinhan Fan, Wei Li 0038, Ning Li 0007, Junyan Ren |
Sci. China Inf. Sci. | 2 |
| 2010 | A current-mode 6-9GHz UWB transmitter with output power flattening techniqueabstractThis paper presents a current-mode 6~9GHz RF transmitter for OFDM-UWB system applications. By a current-mode low pass filter with variable gain between the digital-to-analog converter and the up-conversion mixer, this transmitter exceeds the traditional voltage-mode counterpart in terms of high linearity (+3.5-dBm output 1-dB compression point, +12.5-dBm output third intercept point) and low spurious emission (50-dB sideband rejection) with low power consumption (40-mA current under 1.2-V supply voltage). By an output power flattening technique, the output power ripple is restricted within ±0.5dB. By an inductor-less divider and active-inductor LO buffer, a small die area of 0.72 mm2is obtained with TSMC's 0.13-μm 1P8M RF CMOS technology. The design is verified through post-layout simulations. Jinhan Fan, Wei Li 0038, Ning Li 0007, Junyan Ren |
ISCAS | 2 |