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Yun Sang Lee

dblp:98/11497 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2014
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 61% Embedded and real-time systems · 39%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems
flash and SSD
0.212014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014
Embedded and real-time systems › real-time scheduling
hard real-time scheduling
0.212014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014
Storage systems › flash and SSD › flash memory
NAND flash
0.212014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014
Embedded and real-time systems
automotive embedded systems
0.112014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014

Methods — techniques the papers use, named apart from their topics

paging scheme · 0.2RAM partitioning · 0.2
YearPublicationVenuePosition
2014 HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory
abstract
For advanced features of next generation vehicles, the real-time programs in automotive embedded systems are dramatically increasing. For such large volume program codes, this paper proposes a novel framework to use high-density and low-cost nonvolatile memory, i.e., NAND flash memory, as a low-cost means of storing and executing hard real-time programs. Regarding this, one challenge is that NAND flash memory allows only 2 KB page-based read operations not per-byte random accesses, which requires RAM as working storage for code executions. This paper proposes two solutions, i.e., partitioned RAM solution and shared RAM solution, that minimize the RAM size required to deterministically guarantee the deadlines of all the hard real-time tasks. The proposed solutions are verified with the actual real-time programs for unmanned autonomous driving. To the best of our knowledge, this is the first work that allows us to use NAND flash memory for hard real-time program executions with the minimal usage of RAM.
Kyoung-Soo We, Chang-Gun Lee, Kyongsu Yi, Kwei-Jay Lin, Yun Sang Lee
IEEE Trans. Computers5