EDBT 2026 Demo / reviewers in the wild / expert
Carl E. Love
dblp:98/157
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 2000
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › instruction scheduling
dynamic instruction scheduling |
0.0 | 1 | 1990 | An Investigation of Static Versus Dynamic Scheduling · ISCA 1990 |
Processor architecture and microarchitecture
instruction scheduling |
0.0 | 1 | 1990 | An Investigation of Static Versus Dynamic Scheduling · ISCA 1990 |
Processor architecture and microarchitecture › instruction scheduling
static instruction scheduling |
0.0 | 1 | 1990 | An Investigation of Static Versus Dynamic Scheduling · ISCA 1990 |
Processor architecture and microarchitecture › execution model
decoupled access/execute architecture |
0.0 | 1 | 1990 | An Investigation of Static Versus Dynamic Scheduling · ISCA 1990 |
Processor architecture and microarchitecture › instruction-level parallelism
VLIW |
0.0 | 1 | 1990 | An Investigation of Static Versus Dynamic Scheduling · ISCA 1990 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2000 | Oscillatory Metastability in Optical Network Synchronizer Circuits
Carl E. Love, Harry F. Jordan |
J. Supercomput. | 1 |
| 1990 | An Investigation of Static Versus Dynamic SchedulingabstractThis paper investigates two techniques for instruction scheduling, dynamic and static scheduling.A decoupled access/execute architecture consists of an execution unit and a memorv unit with seoarate nroeram counters and seuarate instiuction memoges.The v&y long instruction w&d (VLIW) architecture has only one program counter and relies on the compiler to perform stat& szheduling of multiple units.To idealize the comparison the VLIW architecture considered hsd only two units.The instruction sets and execution times for the two architectures were made as nearly the same as possible.The execution times were compared and analyzed to compare the capabilities of static and dynamic instruction scheduling.Both regular and irregular programs were constructed and optimized by hand for each architecture.The experiment showed that the two methods are nearly equally powerful.The decoupled architecture performed better on subroutine calls than the VLIW architecture.It also worked better on programs which switched from memory intensive to computation intensive code.The decouoled architecture wss zenerallv better at hidinn the floating point latency.Thcregist& sharing enable; the VLIW architecture to do more load balancing which resulted in shorter initialization times, and short& loop iteration times. Carl E. Love, Harry F. Jordan |
ISCA | 1 |