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Harjinder S. Sandhu

dblp:98/3387 · DBLP profile ↗
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6ranked-venue papers
4as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 4 first-authorSoftware engineering, systems software and programming languages · 3 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Memory systems · 57% Processor architecture and microarchitecture · 16% Storage systems · 14%
Software engineering, system software, and programming languages
2 papers
Operating systems · 94% Programming languages and type systems · 6%

Topics — the 13 heaviest of 16, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache coherence
0.021995
An Analytic Study of Dynamic Hardware and Software Cache Coherence Strategies · SIGMETRICS 1995
The Shared Regions Approach to Software Cache Coherence on Multiprocessors · PPoPP 1993
Memory systems › cache coherence
software cache coherence
0.021995
An Analytic Study of Dynamic Hardware and Software Cache Coherence Strategies · SIGMETRICS 1995
The Shared Regions Approach to Software Cache Coherence on Multiprocessors · PPoPP 1993
Operating systems › resource management
memory management
0.011999
The Region Trap Library: Handling Traps on Application-Defined Regions of Memory · USENIX ATC, General Track 1999
Operating systems › resource management › memory management
virtual memory
0.011999
The Region Trap Library: Handling Traps on Application-Defined Regions of Memory · USENIX ATC, General Track 1999
Processor architecture and microarchitecture
instruction set architecture
0.011999
The Region Trap Library: Handling Traps on Application-Defined Regions of Memory · USENIX ATC, General Track 1999
Memory systems
memory protection
0.011999
The Region Trap Library: Handling Traps on Application-Defined Regions of Memory · USENIX ATC, General Track 1999
Storage systems › file systems
file system workload
0.011994
A Case Study of File System Workload in a Large-Scale Distributed Environment · SIGMETRICS 1994
Memory systems
cache management
0.011993
The Shared Regions Approach to Software Cache Coherence on Multiprocessors · PPoPP 1993
Parallel and multicore computing › multiprocessor system
shared-memory multiprocessor
0.011993
The Shared Regions Approach to Software Cache Coherence on Multiprocessors · PPoPP 1993
Storage systems › file systems › distributed file system
file replication
0.011992
Cluster-Based File Replication in Large-Scale Distributed Systems · SIGMETRICS 1992
Memory systems › cache management › storage caching
client-side caching
0.011992
Cluster-Based File Replication in Large-Scale Distributed Systems · SIGMETRICS 1992
Distributed systems › resource sharing
data sharing
0.011992
Cluster-Based File Replication in Large-Scale Distributed Systems · SIGMETRICS 1992
Memory systems › cache management › storage caching
file caching
0.011992
Cluster-Based File Replication in Large-Scale Distributed Systems · SIGMETRICS 1992

Methods — techniques the papers use, named apart from their topics

synchronization-based coherence · 0.0software cache coherence · 0.0markov chain analysis · 0.0analytic modeling · 0.0trace analysis · 0.0workload characterization · 0.0
YearPublicationVenuePosition
1999 The Region Trap Library: Handling Traps on Application-Defined Regions of Memory
Tim Brecht, Harjinder S. Sandhu
USENIX ATC, General Track2
1995 An Analytic Study of Dynamic Hardware and Software Cache Coherence Strategies
abstract
Dynamic software cache coherence strategies use information about program sharing behaviour to manage caches at run-time and at a granularity defined by the application. The program-level information is obtained through annotations placed into the application by the user or the compiler. The coherence protocols may range from simple static algorithms to dynamic algorithms that use run-time data structures similar to the directories used in hardware strategies. In this paper, we present an analytic study of five dynamic software cache coherence algorithms and compare these to a representative hardware coherence strategy. The analytic model is constructed using four input parameters --- write probability, locality, granularity, and system size --- and solved by analysis of a Markov chain. We show that the fundamental tradeoffs between the different hardware and software strategies are captured in this model. The results of the study show that hardware schemes perform better for fine-grained data structures for much of the parameter space that we study. However, for coarse-grained data structures, various software algorithms are dominant over most of the parameter space. Further, hardware strategies are found to be more susceptible to the effects of contention, and also perform worse for the asymmetric workload that we study.
Harjinder S. Sandhu, Kenneth C. Sevcik
SIGMETRICS1
1995 algorithms for Dynamic Software Cache Coherence
Harjinder S. Sandhu
J. Parallel Distributed Comput.1
1994 A Case Study of File System Workload in a Large-Scale Distributed Environment
abstract
No abstract available.
Deepinder S. Gill, Songnian Zhou, Harjinder S. Sandhu
SIGMETRICS3
1993 The Shared Regions Approach to Software Cache Coherence on Multiprocessors
abstract
The effective management of caches is critical to the performance of applications on shared-memory multiprocessors. In this paper, we discuss a technique for software cache coherence tht is based upon the integration of a program-level abstraction for shared data with software cache management . The program-level abstraction, called Shared Regions, explicitly relates synchronization objects with the data they protect. Cache coherence algorithms are presented which use the information provided by shared region primitives, and ensure that shared regions are always cacheable by the processors accessing them. Measurements and experiments of the Shared Region approach on a shared-memory multiprocessors accessing them. Measurements and experiments of the Shared Region approach on a shared-memory multiprocessor are shown. Comparisons with other software based coherence strategies, including a user-controlled strategy and an operating system-based strategy, show that this approach is able to deliver better performance, with relatively low corresponding overhead and only a small increase in the programming effort. Compared to a compiler-based coherence strategy, the Shared Regions approach still performs better than a compiler that can achieve 90% accuracy in allowing cacheing, as long as the regions are a few hundred bytes or larger, or they are re-used a few times in the cache.
Harjinder S. Sandhu, Benjamin Gamsa, Songnian Zhou
PPoPP1
1992 Cluster-Based File Replication in Large-Scale Distributed Systems
abstract
The increasing need for data sharing in large-scale distributed systems may place a heavy burden on critical resources such as file servers and networks. Our examination of the workload in one large commercial engineering environment shows that wide-spread sharing of unstable files among tens to hundreds of users is common. Traditional client-based file cacheing techniques are not scalable in such environments.
Harjinder S. Sandhu, Songnian Zhou
SIGMETRICS1