Demo Data from EDBT 2026 / reviewers in the wild / expert
Kevin P. McAuliffe
dblp:98/6006
· DBLP profile ↗
7ranked-venue papers
0as first author
0since 2021 · last 1992
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6Software engineering, systems software and programming languages · 2Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Interconnection networks and networks-on-chip · 28% Memory systems · 26% Processor architecture and microarchitecture · 25% | |
| Software engineering, system software, and programming languages
1 paper |
Operating systems · 100% |
Topics — the 6 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip › switching network › multistage interconnection network
shuffle-exchange network |
0.0 | 2 | 1983 | The NYU Ultracomputer - Designing an MIMD Shared Memory Parallel Computer · IEEE Trans. Computers 1983 The NYU Ultracomputer-designing a MIMD, shared-memory parallel machine (Extended Abstract) · ISCA 1982 |
Memory systems
cache coherence |
0.0 | 1 | 1985 | Issues Related to MIMD Shared-memory Computers: The NYU Ultracomputer Approach · ISCA 1985 |
Memory systems › shared memory
scalable shared memory |
0.0 | 1 | 1985 | Issues Related to MIMD Shared-memory Computers: The NYU Ultracomputer Approach · ISCA 1985 |
Processor architecture and microarchitecture › atomic operations
fetch-and-add synchronization |
0.0 | 2 | 1983 | The NYU Ultracomputer - Designing an MIMD Shared Memory Parallel Computer · IEEE Trans. Computers 1983 The NYU Ultracomputer-designing a MIMD, shared-memory parallel machine (Extended Abstract) · ISCA 1982 |
Interconnection networks and networks-on-chip › switching network
multistage interconnection network |
0.0 | 1 | 1983 | The NYU Ultracomputer - Designing an MIMD Shared Memory Parallel Computer · IEEE Trans. Computers 1983 |
Parallel and multicore computing
parallel architecture |
0.0 | 1 | 1983 | The NYU Ultracomputer - Designing an MIMD Shared Memory Parallel Computer · IEEE Trans. Computers 1983 |
Methods — techniques the papers use, named apart from their topics
scalable architecture · 0.0hardware-software co-design · 0.0simulation · 0.0analytic modeling · 0.0analytical modeling · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1992 | An Architecture for a Scientific Visualization SystemabstractThe architecture of the Data Explorer, a scientific visualization system, is described. Data Explorer supports the visualization of a wide variety of data by means of a flexible set of visualization modules. A single powerful data model common to all modules allows a wide range of data types to be imported and passed between modules. There is integral support for parallelism, affecting the data model and the execution model. The visualization modules are highly interoperable, due in part to the common data model, and exemplified by the renderer. An execution model facilitates parallelization of modules and incorporates optimizations such as caching. The two-process client-server system structure consists of a user interface that communicates with an executive via a dataflow language.> Bruce Lucas, G. D. Abrams, Nancy S. Collins, D. A. Epstien, Donna L. Gresh, Kevin P. McAuliffe |
IEEE Visualization | 6 |
| 1988 | Automatic Management of Programmable Caches
Ron Cytron, Steve Karlovsky, Kevin P. McAuliffe |
ICPP (2) | 3 |
| 1985 | RP3 Processor-Memory Element
William C. Brantley, Kevin P. McAuliffe, Jodi Weiss |
ICPP | 2 |
| 1985 | The IBM Research Parallel Processor Prototype (RP3): Introduction and Architecture
Gregory F. Pfister, William C. Brantley, David A. George, Steve L. Harvey, Wally J. Kleinfelder, Kevin P. McAuliffe, Evelin S. Melton, V. Alan Norton, Jodi Weiss |
ICPP | 6 |
| 1985 | Issues Related to MIMD Shared-memory Computers: The NYU Ultracomputer ApproachabstractWe present an updated report on the NYU Ultracomputer design emphasizing recent results on programming, operating systems, caching, demand paging, and I/O.The user's view of the Ultracomputer is presented along with the hardware and software implementation.Freedom from serial bottlenecks in both hardware and software allows the Ultracomputer to obtain performance that scales nearly linearly in the size of the machine for a broad spectrum of problems. Jan Edler, Allan Gottlieb, Clyde P. Kruskal, Kevin P. McAuliffe, Larry Rudolph, Marc Snir, Patricia J. Teller |
ISCA | 4 |
| 1983 | The NYU Ultracomputer - Designing an MIMD Shared Memory Parallel ComputerabstractWe present the design for the NYU Ultracomputer, a shared-memory MIMD parallel machine composed of thousands of autonomous processing elements. This machine uses an enhanced message switching network with the geometry of an Omega-network to approximate the ideal behavior of Schwartz's paracomputer model of computation and to implement efficiently the important fetch-and-add synchronization primitive. We outine the hardware that would be required to build a 4096 processor system using 1990's technology. We also discuss system software issues, and present analytic studies of the network performance. Finally, we include a sample of our effort to implement and simulate parallel variants of important scientific p̀rograms. Allan Gottlieb, Ralph Grishman, Clyde P. Kruskal, Kevin P. McAuliffe, Larry Rudolph, Marc Snir |
IEEE Trans. Computers | 4 |
| 1982 | The NYU Ultracomputer-designing a MIMD, shared-memory parallel machine (Extended Abstract)abstractWe present the design for the NYU Ultracomputer, a shared-memory MIMD parallel machine composed of thousands of autonomous processing elements. This machine uses an enhanced message switching network with the geometry of an Omega-network to approximate the ideal behavior of Schwartz's paracomputer model of computation and to implement efficiently the important fetch-and-add synchronization primitive. We outline the hardware that would be required to build a 4096 processor system using 1990's technology. We also discuss system software issues, and present analytic studies of the network performance. Finally, we include a sample of our effort to implement and simulate parallel variants of important scientific programs. Allan Gottlieb, Ralph Grishman, Clyde P. Kruskal, Kevin P. McAuliffe, Larry Rudolph, Marc Snir |
ISCA | 4 |