With the accelerated global energy transition, there is an increasing demand for photovoltaic (PV) inverters with higher efficiency and power density. However, traditional silicon-based devices are approaching their physical limits, constraining opportunities to further enhance the performance of PV inverter systems. GaN HEMT offers a promising alternative to silicon-based devices, due to its superior characteristics such as low switching loss and compact device size. This paper presents the design of a 5kW single-phase two-stage PV inverter using GaN HEMTs, highlighting their power density and efficiency advantages for residential PV applications. The study focuses on the operating principle of the system, control strategy, passive device design, and a detailed loss evaluation of the inverter. A prototype is developed, featuring a peak efficiency of 98.57% and a power density of 1.254 kW/L.

In three-level neutral-point clamped (NPC) converters, carrier-based techniques are widely applied to solve the inherent capacitor voltage balancing problem as well as the common-mode voltage (CMV) mitigation. This article proposes a novel approach to simultaneously address the voltage balancing and CMV issues in a three-phase three-level single-end inverter. It can reduce the dv/dt actions (33%-66%) as well as restricting the CMV magnitude to one-sixth of DC voltage while eliminating the low-frequency voltage oscillation at the dc-ink neutral point. The proposed control method cohesively combines two methods (Method I and Method II) and selects them according to the neutral point (NP) voltage balancing condition. Method I generates four dv/dt actions in a switching cycle with higher voltage balancing ability while Method II only generates two dv/dt actions in a switching cycle with lower voltage balancing ability. Experiments are performed to validate the proposed control method. Additionally, this work observes and investigates the non-ideal phenomenon in practical circuits that causes spikes in the CMV that should have been eliminated from the modulation point of view, which have not been well studied in the literature where explanations and solutions are provided.

The Si/SiC hybrid switch (HyS), consisting of a low current rated SiC MOSFET paralleled with a high current rated IGBT, can achieve high output current at low cost and reduce switching losses caused by the tail current during the IGBT turn-off transition. When the device turns on, high-frequency ringing at the gate can induce voltage overshoots and current spikes, thereby increasing the device’s current stress. The high-frequency oscillation occurs between the transistor’s capacitance and the board’s parasitic inductance. Such high-frequency oscillations also increase electromagnetic interference (EMI), which can disrupt the performance of the parallel hybrid switch. When the load current is concentrated in the MOSFET, the generated heat accelerates its degradation. Reducing the transition time needed to achieve current balancing can enhance system reliability. In this paper, a detailed turn-on analytical model has been proposed to analyze the effect of parasitic inductances and capacitances, and the current dynamic sharing transition speed to offer guidelines for Si/SiC hybrid power module design. The symmetry of the power loop inductance is also analyzed in the model, providing a more systematic and comprehensive analysis of the turn-on characteristics of the hybrid switch compared to existing models. The validity of the model is verified through simulation and experiments.

This paper comprehensively utilizes three control freedoms, i.e., switching state selection, zero sequence injection(ZSI) and redundant level modulation(RLM), to maintain capacitor voltage balance in two five-level three-phase converters over the full range of modulation index and power factor. The calculation process of the proposed control method is explained in detail. This method is easy to implement and can be used in other multilevel converters. The first topology is proposed for the first time in this paper. The capacitor voltage controllable region of the second topology has been extended to full operation range without extra circuits. Voltage jumps are found during the deadtime. The performance of the proposed topology and control method is verified by simulation and experiment.

Partial discharge (PD) is a prime cause of premature failure of inverter-fed motor winding insulation. With the emergence of fast-switching wide-bandgap silicon-carbide (SiC) power devices, random-wound motors are more vulnerable to highly repetitive PDs due to the high-frequency steep-fronted switching transitions that result in overvoltage oscillations at the motor terminals and non-uniform voltage distribution within the motor winding turns. This paper investigates the impact of the applied PWM voltage waveforms on the PD behavior in SiC-based inverter-fed motor drives, including two-level and three-level PWM waveforms. The electric field distribution inside insulation defects (air cavities) is analysed for the PWM voltage waveforms to theoretically predict the number and phase of probable PD events within the fundamental cycle. An experimental PD measurement setup is used to validate the theoretical analysis by applying the PWM voltage waveforms, that are generated by SiC-based power converters, on a typical turn-to-turn motor winding insulation system created by a twisted pair of enamelled magnet wire. Phase-resolved PD patterns are generated to assess the PD behavior against the PWM characteristics of each voltage waveform and the associated overvoltage pattern when power cables are used to emulate the voltage reflections in cable-fed motor drives.

Multilevel converters are widely used in medium-voltage power conversion systems. In this paper, a novel five-level converter is proposed. For a three-phase system, the converter requires 30 power semiconductor devices and 12 flying capacitors in total. The required blocking voltages of all the switches are the same and the converter is suitable for medium-voltage high-power applications. A method has been proposed to control the flying capacitors' voltages. The feasibility of the proposed topology and the control method have been validated through simulation in MATLAB/Simulink.