EDBT 2026 Demo / reviewers in the wild / expert
Thomas Salter
dblp:98/9466
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 67% Electronic design automation · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › analog and mixed-signal circuits
device modeling |
0.4 | 1 | 2020 | Memristor Model Optimization Based on Parameter Extraction From Device Characterization Data · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Integrated circuit design › memristor
memristor device modeling |
0.4 | 1 | 2020 | Memristor Model Optimization Based on Parameter Extraction From Device Characterization Data · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Electronic design automation › circuit modeling
parameter extraction |
0.4 | 1 | 2020 | Memristor Model Optimization Based on Parameter Extraction From Device Characterization Data · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Methods — techniques the papers use, named apart from their topics
parameter optimization · 0.4i-v curve fitting · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Memristor Model Optimization Based on Parameter Extraction From Device Characterization DataabstractThis paper presents a memristive device model capable of accurately matching a wide range of characterization data collected from a tantalum oxide memristor. Memristor models commonly use a set of equations and fitting parameters to match the complex dynamic conductivity pattern observed in these devices. Along with the proposed model, a procedure is also described that can be used to optimize each fitting parameter in the model relative to an I-V curve. Therefore, model parameters are self-updated based on this procedure when a new cyclic I-V sweep is provided for model optimization. This model will automatically provide the best possible match to the characterization data without any additional optimization from the user. In this paper, multiple cyclic I-V characterizations are modeled from ten different tantalum oxide devices (on the same wafer). Additionally, studies were completed to demonstrate the amount of variation present between devices on a wafer, as well as the amount of variation present within a single device. Methods for modeling this variation are then proposed, resulting in an accurate and complete, automated, memristor modeling approach. Chris Yakopcic, Tarek M. Taha, David J. Mountain, Thomas Salter, Matthew J. Marinella, Mark R. McLean |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |