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Kyouko Iwasawa

dblp:99/10920 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1990
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
High-performance computing · 77% Processor architecture and microarchitecture · 23%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
vectorization
0.011988
Compiling techniques for first-order liner recurrences on a Vector computer · SC 1988
High-performance computing
performance optimization at scale
0.011988
Compiling techniques for first-order liner recurrences on a Vector computer · SC 1988
Processor architecture and microarchitecture
vector processor
0.011988
Compiling techniques for first-order liner recurrences on a Vector computer · SC 1988

Methods — techniques the papers use, named apart from their topics

vectorizing compiler · 0.0automatic transformation · 0.0
YearPublicationVenuePosition
1990 Compiling techniques for first-order linear recurrences on a vector computer
Yoshikazu Tanaka, Kyouko Iwasawa, Yukio Umetani, Shizuo Gotou
J. Supercomput.2
1988 Compiling techniques for first-order liner recurrences on a Vector computer
abstract
The authors discuss high-performance methods for solving first-order linear recurrences on a vector computer, investigate automatic transformations, and develop the compiling techniques for first-order linear recurrence problems. The results show that the improved vector code generated by the vectorizing compiler run at the rate of 150 MFLOPS (million floating operations per second), in the case of the moderate loop lengths (>1000), and at the rate of over 200 MFLOPS, in the case of long loop lengths (>10000), on the HITAC S-820 supercomputer. Overall performance improvements of 69% in the 14 Lawrence Livermore Loops and 25% in the 24 Lawrence Livermore Loops, as measured by the harmonic mean, are attained.>
Yoshikazu Tanaka, Kyouko Iwasawa, Shizuo Gotou, Yukio Umetani
SC2