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Takayoshi Nakashima

dblp:99/2367 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1986
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing
array processor		 0.011986
Pseudo MIMD Array Processor - AAP2 · ISCA 1986
Parallel and multicore computing › parallel architecture
SIMD/MIMD execution		 0.011986
Pseudo MIMD Array Processor - AAP2 · ISCA 1986
Parallel and multicore computing
pipelined processing		 0.011986
Pseudo MIMD Array Processor - AAP2 · ISCA 1986

Methods — techniques the papers use, named apart from their topics

LSI integration · 0.0
YearPublicationVenuePosition
1986 Pseudo MIMD Array Processor - AAP2
abstract
A highly integrated array processor (AAP2)-LSI has been developed. After the past 3 years study on the adaptive array processor 1 (AAP1), a challenging improvements on the SIMD's restraints are achieved by using the AAP2-LSI. The AAP2 array system makes it possible to carry out wideband modifiable operation (pseudo MIMD). Furthermore, each PE is capable of supporting a large amount of memory. The AAP2 potential for massively, parallel and pipelined processing is discussed in the field of image processing and CAD applications. A highly integrated array processor (AAP2)-LSI has been developed. After the past 3 years study on the adaptive array processor 1 (AAP1), a challenging improvements on the SIMD's restraints are achieved by using the AAP2-LSI. The AAP2 array system makes it possible to carry out wideband modifiable operation (pseudo MIMD). Furthermore, each PE is capable of supporting a large amount of memory. The AAP2 potential for massively, parallel and pipelined processing is discussed in the field of image processing and CAD applications.
Toshio Kondo, Toshio Tsuchiya, Yoshihiro Kitamura, Yoshi Sugiyama, Takashi Kimura, Takayoshi Nakashima
 ISCA6