Industry 5.0 envisions manufacturing systems that are human-centric, sustainable, and resilient. In this context, the Internet of Everything (IoE) enables integration of devices, people, and processes into a unified digital ecosystem. This paper presents a modular, semantically enriched framework that supports this transition by managing heterogeneous data sources—such as IoT sensors, wearable devices, and smart objects—through a layered architecture. The platform enables real-time data stream processing, semantic interoperability, and secure, context-aware access. Anomaly detection is enabled through a privacy-preserving mechanism based on behavioral fingerprinting and federated learning. The platform supports immersive human-machine interaction via gesture recognition, empowering workers to control and interact with industrial systems. Use cases demonstrate the system’s ability to support gesture-based control and intelligent monitoring, highlighting its potential to enhance adaptability, security, and worker empowerment in Industry 5.0 environments.

Porting to the cloud large scientific applications designed and optimized for a standard HPC facility does not always pay off, mainly because of the implied communication pattern. By profiling the applications, researchers can build a performance model, which is able to give insights about how the application will perform on the cloud. To validate this approach, we use a hemodynamic application that embeds both heavy computations and extensive communications with several collective operations to exchange data across all processes. We expect that this case instance is a model for other applications. Our approach is based on profiling and modeling, and builds an analytical model for the communication pattern of the chosen hemodynamic application. We collect data both on an on-premise HPC system and on the Google Cloud infrastructure, and assess the prediction based on the analytic model. The outcome suggests that the prediction consistently underestimates the actual execution time, but correctly guess the scalability, thus allowing to strike a good balance between performance and costs. Finally, we introduce a figure of merit to assess cost vs performance between cloud and on-premise implementation, and validate a first version of such a model.

After a brief introduction on Cross Motif Search and its OpenMP and Hybrid OpenMP-MPI implementations, this paper compares the scalability, efficiency and speedup of the hybrid implementation on a small cluster and on a real HPC system, explaining which factors make the application more efficient when it runs on the real HPC architecture. Using profiling and tracing tools highlighted that the hybrid implementation cannot exploit the OpenMP parallelism because of different factors (heap contention among the threads, spin time and overhead time introduced by OpenMP and thread-safe external functions), making the pure MPI implementation better than any other hybrid one. By characterizing of the workload, we also discovered that the application gets improved by changing the order with which tasks are processed. This observation leads to the introduction of a new selection policy, named Longest Job First. The new policy represents a winning solution for tasks submission among all running MPI processes.

Summary This paper describes the message passing parallel implementation of the Cross Motif Search algorithm (MPI‐CMS). It is an extension and specifically improves on the results obtained in a conference paper presented at PBIO 2014. CMS is a bioinformatics algorithm whose goal is to search for geometrical motifs in proteins. For the purpose of a complete characterization of protein similarities, it would be important to run CMS on the largest possible dataset. Unfortunately, due to its precision, CMS is inherently slow; thus, it was originally implemented using a shared memory parallel paradigm. In the original conference paper, we proved that the OpenMP implementation of Cross Motif Search (MP‐CMS) is extremely inefficient and cannot scale adequately. To solve the problem, we designed a new parallel implementation of CMS (MPI‐CMS) based on a hybrid shared memory and message passing paradigm. This paper reconsiders MPI‐CMS with the target to port it on a supercomputing machine. The focus is on the dependence of performance in the hybrid approach on the workload unbalance. Using a simple statistical analysis of the workload we discuss several strategies through which we can improve the design of MPI‐CMS. We conclude the paper describing a revised implementation of MPI‐CMS, which takes into account the size of the protein pairs to fine‐tune the parallelization strategy. Copyright © 2015 John Wiley & Sons, Ltd.

The retrieval and identification of geometrical motifs is an important open problem in bioinformatics. In previous works we presented Cross Motif Search (CMS), a novel algorithm which is able to search for recurring geometrical patterns in the secondary structure of proteins. A single run of CMS is able to look for similarities between a pair of proteins, and can be easily extended to compare each pair of proteins in an arbitrarily large dataset. We have implemented a shared memory parallel version of CMS and analyzed its scalability, which is limited to 8 cores. So, when the number of proteins in the set increases, the execution time of the algorithm quickly becomes unmanageable and the OpenMP implementation cannot keep up by just increasing the number of cores. In this paper we present a new hybrid parallel implementation of CMS, which combines the previous OpenMP approach with OpenMPI. Experimental runs on the same small-sized server (32 cores) show that the best hybrid OpenMP-OpenMPI configuration outperforms the best OpenMP one by a factor of 13.52. This result is confirmed on a medium-sized cluster with 256 cores, that allows the processing a larger data set in reasonable times. We also show that the new design is able to achieve great efficiency and scalability, which allows us to process huge data-set of proteins up to, in theory, the entire Protein Data Bank.

The study of proteins is a crucial aspect of the biological field, as they are essential elements of every living cell. Often, the function of a given protein is tightly tied to its geometric structure. Thus, protein structure analysis is an important issue with multiple applications. For example, the ability of a protein to bind other proteins or ligands and the estimation of evolutionary distances between families of proteins are both based on their spatial structure. A key part in the geometric description of a protein is played by the structural motif, a 3D element which appears in a variety of molecules and it is usually made of just a few structures. In this paper we will consider only motifs of secondary structures (SS in the following). The goal is to implement a parallel method to detect the presence and location of all motifs of SSs in a given protein or in a set of proteins. The paper discusses all possible forms of available parallelism, both shared memory and message passing. The analysis is based on existing approaches, such as Secondary Structure Co-Occurrences (SSC) [4, 5] and the Secondary Structure Triplets (SST) [6], both based on the General Hough Transform (GHT) technique [1]. The key idea is to ignore the biological significance on the motifs as much as possible, and to focus on the geometric description of the structures which could be simply viewed as vectors in a 3D space. The paper analyzes a parallel implementation, based on OpenMP. It also hints to a possible exploitation of a hybrid MPI/OpenMP paradigm, useful in the special case of cross protein analysis.

In this paper we present and analyze a systolic structure to support the Generalized Hough Transform. Among the structural methods for object recognition, this transform is well established for its flexibility and noise immunity. Its use in actual systems has been however limited by the computational cost associated with the management of votes. Previous work has shown that a limited amount of memory can substitute the large address space required for building the histogram of votes. The systolic queue here introduced substitutes the address space required in a M- dimensional voting process, where the quantization of each dimension into Q bins yields a space complexity O(QM). An N-stage queue uses 3 M log(Q) memory bits at each stage and is capable of accumulating the incoming votes on the fly. The flow of data within the queue is designed to minimize the probability that new votes are lost because of overflow. We derive analytic expressions for the growth of the queue during the set-up period and for the time each new vote spends within the queue if it is not accumulated; furthermore, we show the conditions for the arrival times of a couple of coincident addresses to be detected and merged. The analysis of the time behaviour of the queue supports the experimental evidence that such a structure performs the accumulating process very reliably. A VLSI integrated circuit embedding a 50-stage queue is the third in a chip-set for the real time implementation of the Generalized Hough Transform.

The main goal of the research activity here presented is to realise a dedicated real-time architecture for still-images compression based on a multiresolution approach for the three phases of image transformation, compression and coding. The algorithm embedded into the architecture is adaptive on the input image characteristics, and it is based on a well-known instance of wavelet transform: the Haar transform. The algorithm has been tested in a rather exhaustive set of benchmarks and has been cast into a single-chip design. The paper introduces the main features of the algorithm and describes the problem of mapping the algorithm into a dedicated architecture. The result of this mapping is the chip described.

The paper describes a new pipeline architecture suitable for processing of quaternary trees; the kind of processing is rather general, being based on data reduction, achieved by deleting the nodes of the input tree according to some generic rules. The main application domain of the proposed architecture is image compression. The underlining algorithm uses operations on data organized in hierarchical fashion. In particular, the paper describes how the proposed architecture may be exploited in a system devoted to image compression and based on a multi-resolution formulation of the Haar transform.>

A set of techniques to perform fast speaker adaptation for a large vocabulary, natural-language, speech recognition system are presented. The experimentation has been carried out using a 20000-word, real-time, natural-language speech recognizer for the Italian language. To perform speaker adaptation within the framework of the probabilistic approach to speech recognition two different problems must be addressed: codebook adaptation and hidden Markov model parameters adaptation. The basic idea is to use a set of data collected from several different speakers as a source of a priori knowledge with a small speech sample provided by the new speaker to perform the adaptation task. Several different techniques for codebook adaptation have been tried and discussed.>

Among the various proposal advanced to build massive parallel systems in which the number of computing units ranges in the thousands, hierarchical topologies share a number of interesting properties. The authors review these architectures and their applicability and reliability, with particular attention to connections complexity and the ability to exchange messages. The usual assumption of the multiple instruction multiple data (MIMD) computational paradigm is as follows: autonomous but cooperating tasks execute on different processing units in the system. The overall complexity of the systems is measured with the analysis of the diameter and of the increasing law that states the number of interconnections against the number of nodes in the system. The various architectures are compared in terms of links load and average internode distance.>

Some results are reported on an approach to the vote collecting phase of the Hough transform, particularly of the generalized Hough transform (GHT). The purpose of the analysis is to obtain a reduction in the computational cost of the algorithm that would make it suitable for efficient hardware implementation. The reduction is sought at the level of storage requirements for the accumulator space. The method applied differs from the various approaches that dynamically quantize the accumulator space; it extends previously published work on fixed-size, limited memory by introducing a priori knowledge, in the form of geometry constraints, in the process of votes accumulation. A very simple geometry constraint is embedded in the voting rule. The method is tested in an application to IC inspection. Within the framework of raster scan, real-time image processing, a hardware realization of the algorithm can be based on systolic accumulation of votes in a modified priority queue device.>

Hierarchical multi-microcomputer systems are reviewed, with particular attention given to the complexity of the interconnection structure and to the ability to exchange messages. The assumption of the multiple-instruction multiple-data (MIMD) computational paradigm is followed; autonomous but cooperating tasks execute on different processing units in the system. The overall complexity of the systems is measured with the analysis of the diameter and of the increasing law, which states the number of interconnections against the number of nodes in the system. The various architectures are compared in terms of links load and average internode distance under the uniform reference model of message distribution and of request independence assumption.>

The authors propose an approach to the estimation of the performance of the language model and the acoustic model in probabilistic speech recognition that tries to take into account the interaction between the two. It consists of a new measure, called speech decoder entropy (SDE), of joint acoustic-context information. Some results are presented for a 20000-word vocabulary recognizer. The authors discuss some limitations of the work and some suggestions for future developments.>

An approach to object recognition in an industrial environment is described. With the hypothesis that the universe of objects is limited and that the attitudes in space of any object are constrained by the working environment to a few possibilities, a method is obtained that determines minimal descriptions for each model/object pair. These descriptions, which are discriminant of each model, are used by the recognition strategy planner. It automatically determines which descriptions can be conveniently used to identify the object(s) looked for and in what order. Uncertainties due to overlapping are signaled and tentative classifications listed.>

A real-time speech recognition system for Italian, based on a probabilistic approach, has been developed at the IBM Rome Research Center. It handles natural language sentences, from a 3000-word dictionary, dictated with words separated by short pauses. The architecture consists of an IBM 3090 mainframe and a PC/AT equipped with signal processing hardware. Recognition experiments have been performed for several speakers, each of whom had previously trained the system by dictating a 15-minute text. The paper describes the system, gives results and outlines future developments.

The development of large dictionary speech recognition systems requires the use of techniques aimed at limiting the search of the correct word to a subset of the vocabulary as small as possible. An approach to this problem is to create classes of equivalence among words by means of a phoneme classification. We investigate methods based on the definition of a similarity measure of Hidden Markov Models of phonemes, and on the automatic identification of broad phonetic classes via clustering algorithms. We discuss the obtained classifications, and their use in a real time speech recognition system for a 3000-word dictionary for Italian; results are compared to those achieved by knowledge based classifications.

In 1981 a national research program for the design, simulation and construction of a multiprocessor image processing system was started. After a first phase devoted to the comparison of suggested and existing systems and to the definition of a set of benchmarks and to the evaluation of the performances of the major classes of machines, a new system has been defined. The structure of the new system is based on a pyramid of processors and many applications in which this machine may be exploited are highlighted. The multiprocessor architecture has been fully designed and the chip will be built by an Italian silicon. foundry, the SGS company, within the framework of the multichip national project.